Abstract: The present disclosure provides a cryptocurrency securing method and device thereof. The device receives an encrypted personal identification number from a user device, and decrypts the encrypted personal identification number via a first asymmetric key for deriving a personal identification number. The device decrypts an encrypted personal key via the personal identification number for deriving a personal key, and decrypts an encrypted cryptocurrency private key information via the personal key for deriving a cryptocurrency private key information.

Abstract: A semiconductor device includes a substrate; a first gate stack disposed on the substrate; a second gate stack disposed on the substrate, wherein a metal component of the first gate stack is different from a metal component of the second gate stack; and a dielectric structure disposed over the substrate and between the first gate stack and the second gate stack, in which the dielectric structure is separated from the first gate stack and the second gate stack, and a distance between the dielectric structure and the first gate stack is substantially equal to a distance between the dielectric structure and the second gate stack.

Abstract: A fixing structure for an electronic device includes a mounting body and a mounting bracket. The mounting body includes a side surface, a bottom surface, and at least one limiting member disposed on the bottom surface. The limiting member includes a fixed end and a pillar. The pillar extends downward from the fixed end and protrudes from the bottom surface. The mounting bracket includes a fixing plate and a release assembly. The fixing plate is disposed under the bottom surface of the mounting body, and the fixing plate and the pillar are buckled with each other. The release assembly is disposed on the fixing plate, and the release assembly abuts against the side surface of the mounting body.

Abstract: A system and method for connecting semiconductor dies is provided. An embodiment comprises connecting a first semiconductor die with a first width to a second semiconductor die with a larger second width and that is still connected to a semiconductor wafer. The first semiconductor die is encapsulated after it is connected, and the encapsulant and first semiconductor die are thinned to expose a through substrate via within the first semiconductor die. The second semiconductor die is singulated from the semiconductor wafer, and the combined first semiconductor die and second semiconductor die are then connected to another substrate.

Abstract: Embodiments of the present disclosure generally relate to a sensor of magnetic tunnel junctions (MTJs) with shape anisotropy. In one embodiment, a tunnel magnetoresistive (TMR) based magnetic sensor in a Wheatstone configuration includes at least one magnetic tunnel junctions (MTJ). The MTJ includes a free layer having a first edge and a second edge. The free layer has a thickness of about 100 ? or more. The free layer has a width and a height with a width-to-height aspect ratio of about 4:1 or more. The MTJ has a first hard bias element positioned proximate the first edge of the free layer and a second hard bias element positioned proximate the second edge of the free layer.

Abstract: The present invention provides a point cloud data acquisition method and device under a situation of no GNSS signal. The method comprises: re-sampling line data acquired from a topographic map to obtain discrete line data; generating a full-second PPS pulse in a simulating manner; counting by using a distance measuring instrument, sampling the count, when it is detected that the full-second PPS pulse is received, calculating position information at a current moment; simulating a GNSS satellite protocol according to the position information at the current moment; parsing the GNSS satellite protocol by using a point cloud data acquisition module to complete time synchronization, and controlling a LiDAR to acquire point cloud data; parsing the GNSS satellite protocol by using an inertial measurement module, and recording attitude determination positioning data in real time to generate POS data; and optimizing the POS data to obtain accurate point cloud data.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a substrate and a gate electrode overlying the substrate. Further, the integrated chip includes a contact layer overlies the substrate and is laterally spaced apart from the gate electrode by a spacer structure. The spacer structure may surround outermost sidewalls of the gate electrode. A hard mask structure may be arranged over the gate electrode and between portions of the spacer structure. A contact via extends through the hard mask structure and contacts the gate electrode. The integrated chip may further include a liner layer that is arranged directly between the hard mask structure and the spacer structure, wherein the liner layer is spaced apart from the gate electrode.

Abstract: An apparatus for estimating a condition of a battery includes a mode identifying unit configured to identify a usage mode of the battery during a period of time and its corresponding attenuation curve, according to recorded data on battery usage, stored usage modes of the battery and attenuation curves corresponding to the various usage modes, the attenuation curve representing a change of a fully charged capacity of the battery with battery usage; and a condition estimating unit configured to calculate battery degradation according to the recorded data, the identified usage mode and its corresponding attenuation curve, the degradation representing a quantity of the fully charged capacity of the battery that is reduced over the battery usage. The condition of the battery is estimated so as to rationally judge the residual value of the battery in operation.

Abstract: A method according to the present disclosure includes receiving a workpiece that includes a gate structure, a first gate spacer feature, a second gate spacer feature, a gate-top dielectric feature over the gate structure, the first gate spacer feature and the second gate spacer feature, a first source/drain feature over a first source/drain region, a second source/drain feature over a second source/drain region, a first dielectric layer over the first source/drain feature, and a second dielectric layer over the second source/drain feature. The method further includes replacing a top portion of the first dielectric layer with a first hard mask layer, forming a second hard mask layer over the first hard mask layer while the second dielectric layer is exposed, etching the second dielectric layer to form a source/drain contact opening and to expose the second source/drain feature, and forming a source/drain contact over the second source/drain feature.

Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.

Abstract: The present invention discloses data secure method, applied to a storage device, and performed by a controller of the storage device. The data secure method comprises: receiving a buffer clear command from an external processing unit, wherein the buffer clear command indicates that a first secure area corresponding to a first physical address range of a buffer memory of the storage device is required to be cleared, and a first secure key is corresponding to the first secure area for accessing the first secure area; and in response to the buffer clear command, configuring a secure unit of the storage device to cause the secure unit to use one or more second keys different from the first secure key when accessing the first physical address range.

Abstract: A semiconductor device includes a substrate, a first semiconductor stack including elongated semiconductor features isolated from each other and overlaid in a direction perpendicular to a top surface of the substrate, and a second semiconductor stack including elongated semiconductor features isolated from each other and overlaid in the direction perpendicular to the top surface of the substrate. The second semiconductor stack has different geometric characteristics than the first semiconductor stack. A top surface of the first semiconductor stack is coplanar with a top surface of the second semiconductor stack.

Abstract: In some embodiments, the present disclosure relates to a microelectromechanical system (MEMS) comb actuator including a comb structure. The comb structure includes a support layer having a first material and a plurality of protrusions extending away from a first surface of the support layer in a first direction. The plurality of protrusions are also made of the first material. The plurality of protrusions are separated along a second direction parallel to the first surface of the support layer. The MEMS comb actuator may further include a dielectric liner structure that continuously and completely covers the first surface of the support layer and outer surfaces of the plurality of protrusions. The dielectric liner structure includes a connective portion that continuously connects topmost surfaces of at least two of the plurality of protrusions.

Abstract: Methods and systems for generating an interpolated reshaping function for the efficient coding of high-dynamic range images are provided. The interpolated reshaping function is constructed based on a set of pre-computed basis reshaping functions. Interpolation schemes are derived for pre-computed basis reshaping functions represented as look-up tables, multi-segment polynomials, or matrices of coefficients in a multivariate, multi-regression representation. Encoders and decoders using asymmetric reshaping and interpolated reshaping functions for mobile applications are also presented.

Abstract: A high-pressure burn-in test apparatus comprises a burn-in furnace including a high-pressure burn-in furnace cavity equipped with a driving motor, at least one intake manifold, at least one extension manifold equipped with a nozzle, a communicating tube connected to the intake manifold, and a fan. A processing chamber having a test board is formed inside the high-pressure burn-in furnace cavity. The periphery of at least one of the intake manifold is connected to the at least one extension manifold. At least one component to be tested is placed on the test board. High-pressure gas is ejected through the nozzle to disturb the gas around the component to be tested. The fan is installed in the processing chamber. The driving motor drives the fan to rotate, so that the gas in the processing chamber generates convection, to improve the uniformity of gas temperature distribution.

Abstract: An integrated circuit (IC) includes a first circuit layer that includes a first wireless power transfer (WPT) device, a first chip electrically connected to the first circuit layer, and a first tracking circuit disposed in the first chip. The first WPT device may be configured to extract energy from an electromagnetic signal and provide an output voltage. The first tracking circuit may be powered by the output voltage of the first WPT device and may output tracking data in response to an instruction extracted from the electromagnetic signal.

Abstract: Provided is a wafer container including a frame having a first sidewall and a second sidewall extending along a YZ plane; a plurality of first support structures disposed on the first sidewall and arranged along a Z direction; and a plurality of second support structures disposed on the second sidewall and arranged along the Z direction. One of the plurality of first support structures is horizontally aligned with a corresponding second support structure to constitute a wafer holder. The wafer holder includes a plurality of island structures to hold a wafer in a XY plane, and the plurality of island structures are separated to each other along a X direction. A method for holding at least one wafer is also provided.

Abstract: A method of operating a telemetry system includes automatically populating a first set of fields in a schema of an event definition using a logging library of the telemetry system, and receiving the set of fields via a request message in an application protocol.

Abstract: A fast start-up crystal oscillator (XO) and a fast start-up method thereof are provided. The fast start-up XO may include a XO core circuit, a frequency synthesizer, and a fast start-up interfacing circuit, wherein the frequency synthesizer may include a voltage control oscillator (VCO) and a divider. The XO core circuit generates a XO signal having a XO frequency. The VCO generates a VCO clock having a VCO frequency, and the divider generates a divided clock having a divided frequency, wherein the VCO frequency is divided by a divisor of the divider to obtain the divided frequency. The fast start-up interfacing circuit transmits the divided clock to the XO core circuit, and then generates a reference clock having the XO frequency according to the XO signal. More particularly, the VCO frequency is calibrated according to the reference clock, in order to make the divided frequency approach the XO frequency.

Abstract: A system of training behavior labeling model is provided. Specifically, a processing unit inputs each data of a training data set into a plurality of learning modules to establish a plurality of labeling models. The processing unit obtains a plurality of second labeling information corresponding to each data of a verification data set and generates a behavior labeling result according to the second labeling information corresponding to each data of the verification data set. The processing unit obtains a labeling change value according to the behavior labeling result and first labeling information corresponding to each data of the verification data set. The processing unit, if determining that the labeling change value is greater than a change threshold, updates the first labeling information according to the behavior labeling results, exchanges the training data set and the verification data set and reestablishes the labeling models.