Abstract: A system described herein may provide a technique for Embodiments described herein provide for the use of machine learning, artificial intelligence, and/or other techniques for network-implemented spam call detection. Calls may be screened prior to notifying a called User Equipment (“UE”) that a call has been placed to the called UE. A Machine Learning Spam Detection Component (“MLSDC”) may screen a call, such as a voice call, by initiating a call session between the MLSDC and a calling UE, from which the call was requested. Via the established call session, the MLSDC may receive communications, such as voice communications, from the UE, and may determine a measure of likelihood that the call request is associated with spam by using machine learning or other techniques to compare the received communications against one or more models that indicate attributes of calls that have been identified as spam.

Abstract: A control circuit for an input device including a micro-switch is provided. The control circuit includes an input circuit, a receiver circuit, a control unit, and a detecting unit. The input circuit includes a first contact and a second contact for electrically connecting to the micro-switch. The receiver circuit includes a third contact and a fourth contact for electrically connecting to the micro-switch. The control unit is electrically connected to the first contact and the third contact for providing an input signal via the first contact to the micro-switch and receiving a switching signal from the micro-switch via the third contact. The detecting unit detects a voltage of the second contact to generate a detecting signal. The control unit receives the detecting signal to determine a type of the micro-switch.

Abstract: The disclosed technology is directed towards a frame-based indicator that can convey current network condition information and the type and quality of service currently available. The frame-based indicator can fit the shape of a user equipment, such as surrounding the display screen. The frame can be used to indicate various network information, including, but not limited to signal power, signal quality, noise, type of band available, network speeds and network latency. Network quality and types of services can be differentiated by frame size, frame pattern, frame color, frame color intensity, frame background gradient, frame flash pattern, frame animation, and so forth. The operating system and application programs can use the frame-based indicator to convey the various network-related information.

Abstract: A video condensation & recognition method and a system thereof are used to detect objects in input frames, derive a 3D object trajectory from which one or multiple 2D trajectories with object tubes are extracted, and catch a time position that refers to non-overlapping condition of object tubes for rearrangement of several continuous object tubes and creation of a condensed video. The generated condensed video can be adjusted by the user in the range of longest detected object tube to the generated condensed video length that is very beneficial for video analysis process. Moreover, a searched attribute of an object in a condensed video is classified for the filtering process which is able to display an object correlated with a distinct searched attribute on the condensed video.

Abstract: A liquid crystal display device includes a first substrate, a second substrate, a vertical alignment liquid crystal layer, and a plurality of pixels. Each of the pixels includes a reflective region for performing display in a reflection mode. The first substrate includes a reflective electrode including a first region located within each of the plurality of pixels and a second region located between any two pixels, of the plurality of pixels, adjacent to each other, a transparent insulating layer provided to cover the reflective electrode, and a pixel electrode formed from a transparent conductive material and provided on the transparent insulating layer in each of the plurality of pixels. The second substrate includes a counter electrode.

Abstract: A data processing circuit and a fault-mitigating method, which are adapted for a memory having a faulty bit, are provided. The memory is configured to store data related to an image, a weight for a multiply-accumulate (MAC) operation of image feature extraction, and/or a value for an activation operation. Sequence data is written into the memory. The bit number of the sequence data equals to the bit number used for storing data in a sequence block of the memory. The sequence data is accessed from the memory, wherein the access of the faulty bit in the memory is ignored. The value of the faulty bit is replaced by the value of a non-faulty bit in the memory to form new sequence data. The new sequence data is used for MAC. Accordingly, the accuracy of image recognition can be improved for the faulty memory.

Abstract: A fluorescence detection system is provided and adapted to provide a selectable excitation beam to an optical transmission path for irradiation of a device under test, including a driving module, a lighting module, a first optical module and a second optical module. The driving module includes a first shaft and a second shaft parallel thereto. The lighting module is fixed to the first shaft. The first optical module and the second optical module are fixed to the second shaft. A driving operation enables the driving module to rotate the lighting module, the first optical module and the second optical module simultaneously, determining quickly a combination of one light source, one filter and one spectroscopic module on the optical transmission path, with the combination corresponding in position to the device under test, so as to reduce the volume and cost the fluorescence detection system.

Abstract: An imaging lens driving module includes an imaging lens set, a carrier element and a driving mechanism. The imaging lens set has an optical axis. The carrier element is configured to dispose the imaging lens set, and includes an assembling structure. The assembling structure is disposed on an outer surface of the carrier element, and extends along a direction away from the optical axis. The driving mechanism is configured to drive the carrier element to move, and includes at least one coil pair and at least two magnets. The coil pair is disposed on the assembling structure, and includes a bottom layer coil and a top layer coil. The bottom layer coil is wound around and directly contacted with the assembling structure. The top layer coil is stacked on and wound around the bottom layer coil. The magnets correspond to the coil pair, respectively.

Abstract: A package substrate is adapted to a ball grid array package. The substrate includes two substrate contacts, two solder ball pads, two via holes and two signal lines. A connection line of the two substrate contacts is substantially perpendicular to a connection line of the two solder ball pads. The two substrate contacts are respectively connected to the two via holes by the two signal lines. Each signal line includes a circuit trace section, an approaching section and a bifurcating section connected in sequence. The two circuit trace sections of each signal line are substantially arranged in parallel. The two approaching sections are substantially arranged in parallel and substantially symmetrical about the connection line of the solder ball pads. The two bifurcating sections are substantially symmetrical about the pad connection line and respectively electrically connected to the two via holes.

Abstract: The invention provides a manufacturing method for a multi-layer ceramic capacitor. the method includes: providing a plastic film; coating a layer of ceramic slurry on a side of the plastic film; coating a layer of copper paste on the layer of ceramic slurry to form a raw material, wherein the copper paste includes a copper powder and a graphene powder; and sintering the raw material at a temperature equal to or higher than 800° C. to sinter the layer of ceramic slurry into a ceramic dielectric layer and the copper paste into a copper electrode layer. The copper atoms are restricted by the graphene so that the copper atoms are confined in layer arrangement to improve flatness of copper atoms in the copper electrode layer.

Abstract: A behavior recommendation apparatus, behavior recommendation method, and non-transitory computer readable storage medium thereof are provided. The behavior recommendation apparatus stores a digital twin model, wherein the digital twin model outputs a predicted parameter set after being inputted a behavior sequence and a monitored parameter set. The behavior sequence includes a plurality of behaviors in a first sequence and quantized data. The behavior recommendation apparatus receives the monitored parameter set and an objective, wherein the objective corresponds to a particular parameter in the monitored parameter set. The behavior recommendation apparatus generates a recommended behavior sequence according to the particular parameter, the monitored parameter set, the digital twin model, and a plurality of simulated behavior sequences and displays the recommended behavior sequence on an operation interface.

Abstract: A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.

Abstract: A semiconductor device includes a gate electrode over a channel region of a semiconductor fin, first spacers over the semiconductor fin, and second spacers over the semiconductor fin. A lower portion of the gate electrode is between the first spacers. An upper portion of the gate electrode is above the first spacers. The second spacers are adjacent the first spacers opposite the gate electrode. The upper portion of the gate electrode is between the second spacers.

Abstract: The present invention relates to a gallium nitride transimpedance amplifier, as an essential electronic circuit in the proton beam therapy. Because gallium nitride is more tolerant to the secondary radiation generated during the proton beam therapy, it has high reliability and increases the reliability of the overall system.

Abstract: A tool for a bone implant includes a sleeve and a transmission rod including a transmission member disposed on an end of a shaft. Another end of the shaft is located outside of the sleeve. The transmission member is received in the sleeve and includes a first compartment and a plurality of first teeth surrounding the first compartment. A drilling rod includes a second compartment and a plurality of second teeth surrounding the second compartment. A coupling portion is disposed between the second compartment and a bit. The coupling portion is coupled with the sleeve. The bit is located outside of the sleeve. Two magnets are disposed in the first and second compartments, respectively. Two same poles respectively of the two magnets face each other.

Abstract: A package structure includes a first die, a die stack structure bonded to the first die, a support structure and an insulation structure. The support structure is disposed on the die stack structure, and a sidewall of the support structure is laterally shifted from a sidewall of the die stack structure. The insulation structure is disposed on the first die and laterally wraps around the die stack structure and the support structure.

Abstract: A cable for a hearing device, comprising a plurality of conductors, comprising conductors arranged in twisted pairs (TP1 to TP4) wound around a plastically deformable core wire (FW).

Abstract: Pixel structure, driving method thereof and display device are disclosed. The pixel structure includes: light-emitting device having first electrode coupled to corresponding first voltage line. Driving chip includes: receiving circuit configured to decode first digital clock signal on first control line in display phase to obtain first address data and light emission data; address storage circuit configured to store reference address data before the display phase; data processing circuit configured to output PWM signal and current control signal corresponding to each light-emitting device according to the light emission data when the first address data is the same as the reference address data; current output circuit configured to output driving current according to the current control signal; and gating circuit configured to sequentially receive the PWM signal corresponding to each light-emitting device and transmit the driving current to the output terminal when the PWM signal is in active-level state.

Abstract: Some embodiments of the disclosure provide a semiconductor device. The semiconductor device comprises: a substrate; a first nitride semiconductor layer on the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer and having a band gap larger than a band gap of the first nitride semiconductor layer; an intermediate layer disposed on the second nitride semiconductor layer; and a conductive structure disposed on the intermediate layer, wherein a first even interface is formed between the intermediate layer and the second nitride semiconductor layer.

Abstract: A secure memory card includes a non-volatile memory device for storing data, which includes a specific address and a regular address different from the first specific address; a secure element for conducting a securing operation; and a non-volatile memory controller in communication with the non-volatile memory device and the secure element, adapted to receive a command from a host. The non-volatile memory controller interacts with the secure element to conduct the securing operation in response to the command from the host if the command from the host is secure-element control command. The secure-element control command is a single command taking a single instruction cycle and corresponds to the specific address. The non-volatile memory controller interacts with the non-volatile memory device while having no interaction with the secure element in response to the command from the host if the command from the host is a non-secure-element control command corresponding to the regular address.