Patents by Inventor Ming An

Ming An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11251354
    Abstract: A semiconductor device and method of making same are disclosed. In some embodiments, a method includes: forming a first thermoelectric conduction leg on a substrate; forming a second thermoelectric conduction leg on the substrate to be aligned with the first thermoelectric conduction leg along a same row; forming at least one intermediate thermoelectric conduction structure on an end of the second thermoelectric conduction leg; forming a contact structure to couple the first and second thermoelectric conduction legs via the at least one intermediate thermoelectric conduction structure; and recessing the substrate to form at least one trench substantially adjacent to a respective side edge of either the first thermoelectric conduction leg or the second thermoelectric conduction leg.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: February 15, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hsien Tsai, Shang-Ying Tsai, Fu-Lung Hsueh, Shih-Ming Yang, Jheng-Yuan Wang, Ming-De Chen
  • Patent number: 11251131
    Abstract: A device includes a conductive layer including a bottom portion, and a sidewall portion over the bottom portion, wherein the sidewall portion is connected to an end of the bottom portion. An aluminum-containing layer overlaps the bottom portion of the conductive layer, wherein a top surface of the aluminum-containing layer is substantially level with a top edge of the sidewall portion of the conductive layer. An aluminum oxide layer is overlying the aluminum-containing layer. A copper-containing region is over the aluminum oxide layer, and is spaced apart from the aluminum-containing layer by the aluminum oxide layer. The copper-containing region is electrically coupled to the aluminum-containing layer through the top edge of the sidewall portion of the conductive layer.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: February 15, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Lin Su, Ching-Hua Hsieh, Huang-Ming Chen, Hsueh Wen Tsau
  • Patent number: 11250809
    Abstract: A configuration information setting method including: receiving a user-triggered information setting indication; generating, according to the information setting indication, an information setting instruction including setting indication data, the setting indication data configured to instruct the source driver to set configuration information of the source driver according to the setting indication data; and transmitting the information setting instruction to the source driver via the first signal line.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: February 15, 2022
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yifang Chu, Hao Zhu, Xin Duan, Jieqiong Wang, Ming Chen, Xibin Shao
  • Patent number: 11251141
    Abstract: A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.
    Type: Grant
    Filed: May 31, 2020
    Date of Patent: February 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hsuan Tai, Ting-Ting Kuo, Yu-Chih Huang, Chih-Wei Lin, Hsiu-Jen Lin, Chih-Hua Chen, Ming-Da Cheng, Ching-Hua Hsieh, Hao-Yi Tsai, Chung-Shi Liu
  • Patent number: 11251119
    Abstract: A package structure includes a first semiconductor die, an insulating encapsulant, a plurality of first through insulator vias, a plurality of second through insulator vias, and a redistribution layer. The insulating encapsulant is encapsulating the first semiconductor die. The first through insulator vias are located in a central area of the insulating encapsulant surrounding the first semiconductor die. The second through insulator vias are located in a peripheral area of the insulating encapsulant surrounding the plurality of first through insulator vias located in the central area, wherein an aspect ratio of the plurality of second through insulator vias is greater than an aspect ratio of the plurality of first through insulator vias. The redistribution layer is disposed on the insulating encapsulant and electrically connected to the first semiconductor die, the plurality of first through insulator vias and the plurality of second through insulator vias.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: February 15, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yuan Yu, Cheng-Chieh Hsieh, Hung-Yi Kuo, Hao-Yi Tsai, Ming-Hung Tseng
  • Patent number: 11246275
    Abstract: A method for breeding a small-grain male-sterile rice line and a simple method for producing a hybrid rice seed are provided. The method for breeding the small-grain sterile rice line includes the following steps: crossing a female parent C815S with a male parent Qigui B to obtain a hybrid seed F1; planting the F1 and crossing the F1 with a female parent H155S to obtain a crossed hybrid seed F1?; planting the crossed hybrid seed F1? to obtain a F2? generation; planting an individual plant with ideal plant type, strong tillering, plant dwarf and small grain type from the F2? generation and a F3? generation, and then directional breeding more than two generations to obtain a seed with more than F5? generation as the small-grain sterile rice line.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: February 15, 2022
    Assignees: HUNAN AGRICULTURAL UNIVERSITY, HUNAN HOPING SEEDS SCIENCE & TECHNOLOGY INCORPORATED COMPANY
    Inventors: Wenbang Tang, Yuedong Xiong, Xincai Ding, Guoliang Yi, Guihua Chen, Huabing Deng, Guilian Zhang, Yue Wang, Xingquan Ming, Qiang Xu, Ning Feng
  • Patent number: 11251697
    Abstract: A power converting device for power supply comprises an input port, a voltage boost circuit and an output port. Input port has an input standby pin configured to transmit a first power signal having a first voltage value and an input power pin configured to transmit a second power signal having a second voltage value. Voltage boost circuit electrically connecting to the input standby pin and receives and converts the first power signal having the first voltage value into the first power signal having the second voltage value. Output port has an output standby pin electrically connecting to the voltage boost circuit to receive the first power signal having the second voltage value and an output power pin electrically connecting to the input power pin to receive the second power signal having the second voltage value, wherein the second voltage value is higher than the first voltage value.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: February 15, 2022
    Assignees: MICRO-STAR INT'L CO., LTD., MSI COMPUTER (SHENZHEN) CO., LTD.
    Inventors: Kai-Chieh Chiu, Ming-Chih Lo, Chung-Hsing Chang
  • Patent number: 11246994
    Abstract: Tissue product compositions and methods for treating a patient are provided. The tissue product composition may include a flowable carrier including a hyaluronic acid based material and acellular tissue matrix particles mixed within the carrier. Methods of producing the tissue product composition and an injection device filled with the tissue product composition are also provided. Methods of treating a hand of a patient are also provided.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: February 15, 2022
    Assignee: LifeCell Corporation
    Inventors: Hui Xu, Hui Li, Ming F. Pomerleau, Darin Messina
  • Patent number: 11251328
    Abstract: A semiconductor light-emitting device comprises a substrate; a first adhesive layer on the substrate; multiple epitaxial units on the first adhesive layer; a second adhesive layer on the multiple epitaxial units; multiple first electrodes between the first adhesive layer and the multiple epitaxial units, and contacting the first adhesive layer and the multiple epitaxial units; and multiple second electrodes between the second adhesive layer and the multiple epitaxial units, and contacting the second adhesive layer and the multiple epitaxial units; wherein the multiple epitaxial units are totally separated.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: February 15, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Hsin-Chih Chiu, Chih-Chiang Lu, Chun-Yu Lin, Ching-Huai Ni, Yi-Ming Chen, Tzu-Chieh Hsu, Ching-Pei Lin
  • Patent number: 11248758
    Abstract: A surface light source LED device includes a circuit board, at least one power input and at least two LED bar elements, the at least two LED bar elements are arranged in a staggered manner, and each of the LED bar elements includes a plurality of LED bars arranged linearly on the circuit board. Each of the LED bars has a straight strip structure and has a plurality of LED dies of the same type provided inside. The plurality of LED dies is arranged linearly at equal intervals.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: February 15, 2022
    Assignee: EXCELLENCE OPTOELECTRONICS INC.
    Inventors: Wei-Po Shen, Chun-Ming Lai, Chih-Chiang Chang, Wen-Hsing Huang, Tzeng-Guang Tsai, Kuo-Hsin Huang
  • Patent number: 11251071
    Abstract: A method includes forming a metal layer extending into openings of a dielectric layer to contact a first metal pad and a second metal pad, and bonding a bottom terminal of a component device to the metal layer. The metal layer has a first portion directly underlying and bonded to the component device. A raised via is formed on the metal layer, and the metal layer has a second portion directly underlying the raised via. The metal layer is etched to separate the first portion and the second portion of the metal layer from each other. The method further includes coating the raised via and the component device in a dielectric layer, revealing the raised via and a top terminal of the component device, and forming a redistribution line connecting the raised via to the top terminal.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: February 15, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Ming Shih Yeh, Jing-Cheng Lin, Hung-Jui Kuo
  • Patent number: 11249859
    Abstract: A first backup policy specifies triggering backups at a first frequency and retaining the backups for a first duration. A second backup policy specifies triggering backups at a second frequency, less than the first frequency, and retaining the backups for a second duration, greater than the first duration. When two or more backups are to be triggered on a same day, a backup is allowed to proceed according to the first backup policy. A search is conducted for the allowed backup. If the backup is found, the backup is promoted as a backup conducted according to the second backup policy specifying a retention time of the second duration.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: February 15, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Mengze Liao, Ming Zhang, Karimuthu Rengasamy, Yongsheng Guo, Guo Jingjing
  • Patent number: 11251729
    Abstract: An over-current protection device for a power generator includes a first pin, configured to receive a signal; a detection and control module, coupled to the first pin, and configured to detect the signal to determine whether the signal conforms to a pre-determined condition or not, and to output a control signal when the signal conforms to the pre-determined condition; and an auto-trim and memory module, coupled to the detection and control module, and configured to receive the control signal from the detection and control module for executing corresponding auto-trim measurements and storing corresponding adjustment data.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: February 15, 2022
    Assignee: Infinno Technology Corp.
    Inventors: Hui-Tsung Yang, Ming-Zhi Tzeng
  • Patent number: 11249809
    Abstract: In an approach to limiting container CPU usage based on network traffic, a packet CPU usage for each packet type of one or more packet types is determined. A network CPU usage is calculated for a specific container based on the network CPU usage for each packet type. A container process CPU usage and a total container CPU usage are calculated for the specific container, where the total container CPU usage is the sum of the network CPU usage and the container process CPU usage. Responsive to determining that the total container CPU usage exceeds a threshold, the container CPU consumption quota and the container network bandwidth setting for the specific container are adjusted to reduce the total container CPU usage, using a set of pre-configured parameters.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: February 15, 2022
    Assignee: International Business Machines Corporation
    Inventors: Gang Tang, He Jing, XingYu Zhu, Mo Zhou, Ming Shuang Xian
  • Patent number: 11250433
    Abstract: Training risk determination models based on a set of labeled data transactions. A first set of labeled data transactions that have been labeled during a review process is accessed. A first risk determination model is trained using the first set of labeled data transactions. A first risk score for data transactions of a set of unlabeled data transactions is determined using the first risk determination model. Data transactions in the set of unlabeled data transactions are newly labeled based on the first risk score. The newly labeled data transactions are added to a second set of labeled data transactions that include the first set of labeled data transactions. A second risk determination model is trained using at least the second set of labeled data transactions. A second risk score is determined for subsequently received data transactions and these data transactions are rejected or approved based on the second risk score.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: February 15, 2022
    Assignee: MICROSOFT TECHNOLOGLY LICENSING, LLC
    Inventors: Cezary A. Marcjan, Hung-Chih Yang, Jayaram NM Nanduri, Shoou-Jiun Wang, Ming-Yu Fan
  • Patent number: 11249281
    Abstract: A micro imaging system includes, in order from an object side to an image side: a first lens element having negative refractive power; a second lens element having positive refractive power; and a third lens element with negative refractive power having an object-side surface being concave in a paraxial region thereof. There are a total of three lens elements in the micro imaging system.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: February 15, 2022
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Kuan-Ming Chen, Hsin-Hsuan Huang
  • Patent number: 11251925
    Abstract: An apparatus and a method of wireless communication of the same are provided. The method includes receiving data from a second user equipment, performing decoding on the data from the second user equipment, and transmitting, to the second user equipment, feedback information according to a decoding state associated with the decoding on the data from the second user equipment, wherein the feedback information is carried in a sequence.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: February 15, 2022
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventors: Huei-Ming Lin, Zhenshan Zhao, Qianxi Lu
  • Patent number: 11251100
    Abstract: A semiconductor structure including a first semiconductor die, a second semiconductor die, a passivation layer, an anti-arcing pattern, and conductive terminals is provided. The second semiconductor die is stacked over the first semiconductor die. The passivation layer covers the second semiconductor die and includes first openings for revealing pads of the second semiconductor die. The anti-arcing pattern is disposed over the passivation layer. The conductive terminals are disposed over and electrically connected to the pads of the second semiconductor die.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: February 15, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-An Kuo, Ching-Jung Yang, Hsien-Wei Chen, Jie Chen, Ming-Fa Chen
  • Patent number: D943481
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: February 15, 2022
    Assignee: FORMOSA SAINT JOSE CORP.
    Inventor: Ming-Shun Yang
  • Patent number: D943516
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: February 15, 2022
    Assignee: Aukey Technology Co., Ltd
    Inventors: Yang Wang, Ming Li