Abstract: An apparatus comprises a circuit for measuring a gate leakage current of a plurality of transistors. A circuit is provided to apply heat to gates of the plurality of transistors. A circuit is provided to apply a single stress bias voltage to the plurality of transistors for a stress period t. The stress bias voltage is sufficient to cause a 10% degradation in a drive current of the transistor within the stress period t. A processor is provided for estimating a negative bias temperature instability (NBTI) lifetime ? of the transistor based on a relationship between the gate leakage current and one or more of the group consisting of gate voltage, gate length, gate temperature, and gate width of the plurality of transistors. The relationship is determined from data observed while applying the single stress bias voltage.

Abstract: An apparatus comprises a circuit for measuring a gate leakage current of a plurality of transistors. A circuit is provided to apply heat to gates of the plurality of transistors. A circuit is provided to apply a single stress bias voltage to the plurality of transistors for a stress period t. The stress bias voltage is sufficient to cause a 10% degradation in a drive current of the transistor within the stress period t. A processor is provided for estimating a negative bias temperature instability (NBTI) lifetime ? of the transistor based on a relationship between the gate leakage current and one or more of the group consisting of gate voltage, gate length, gate temperature, and gate width of the plurality of transistors. The relationship is determined from data observed while applying the single stress bias voltage.

Abstract: A method includes measuring a gate leakage current of a plurality of transistors. A single stress bias voltage is applied to the plurality of transistors. The stress bias voltage causes a 10% degradation in a drive current of each transistor within a respective stress period t. One or more relationships are determined, between the measured gate leakage current and one or more of the group consisting of gate voltage, gate length, gate temperature, and gate width of the plurality of transistors, respectively. A negative bias temperature instability (NBTI) lifetime ? of the plurality of transistors is estimated, based on the measured gate leakage current and the one or more relationships.

Abstract: A method includes measuring a gate leakage current of a plurality of transistors. A single stress bias voltage is applied to the plurality of transistors. The stress bias voltage causes a 10% degradation in a drive current of each transistor within a respective stress period t. One or more relationships are determined, between the measured gate leakage current and one or more of the group consisting of gate voltage, gate length, gate temperature, and gate width of the plurality of transistors, respectively. A negative bias temperature instability (NBTI) lifetime ? of the plurality of transistors is estimated, based on the measured gate leakage current and the one or more relationships.

Abstract: A method includes measuring a gate leakage current of at least one transistor. A single stress bias voltage is applied to the at least one transistor at a given temperature for a stress period t. The stress bias voltage causes a 10% degradation in a drive current of the transistor at the given temperature within the stress period t. A negative bias temperature instability (NBTI) lifetime ? of the transistor is estimated based on the measured gate leakage current and a relationship between drive current degradation and time observed during the applying step.

Abstract: A dome cover for cooking utensils, including a dome-like cover body made from a meshed steel plate by stamping and defining a plurality of small open spaces in it, and a knob raised from the top center of the dome-like cover body, the dome-like cover body having a stepped outward flange around the border, which stepped outward flange has a rim around the border reinforced by a steel wire.