Abstract: A semiconductor package includes: a dielectric layer having opposing first and second surfaces and side surfaces; a copper wiring layer disposed on the first surface of the dielectric layer and having extension pads; a surface processing layer disposed on the wiring layer; a semiconductor chip disposed on the wiring layer and electrically connected to the surface processing layer; and an encapsulant disposed on the first surface of the dielectric layer for encapsulating the semiconductor chip, the wiring layer and the surface processing layer while exposing the second surface of the dielectric layer. Further, vias are disposed between the side surfaces of the dielectric layer and the encapsulant such that the extension pads are exposed from the vias so as for solder balls to be disposed thereon. Due to improved electrical connection between the copper and solder materials, the electrical connection quality of the package is improved.

Abstract: A semiconductor package and a method of fabricating the same. The semiconductor package includes a dielectric layer having opposite first and second surfaces; a semiconductor chip disposed on the first surface; at least two conductive pads embedded in and exposed from the first surface of the dielectric layer, and electrically connected to the semiconductor chip; a plurality of ball-implanting pads formed on the second surface of the dielectric layer; and a plurality of conductive pillars formed in the dielectric layer, each of the conductive pillars having a first end electrically connected to one of the ball-implanting pads and a second end opposing the first end and electrically connected to one of the conductive pads. Through the installation of the conductive pillars, it is not necessary for the ball-implanting pads to be associated with the conductive pads in position, and the semiconductor package thus has an adjustable ball-implanting area.

Abstract: A semiconductor package includes: a dielectric layer having opposing first and second surfaces and side surfaces; a copper wiring layer disposed on the first surface of the dielectric layer and having extension pads; a surface processing layer disposed on the wiring layer; a semiconductor chip disposed on the wiring layer and electrically connected to the surface processing layer; and an encapsulant disposed on the first surface of the dielectric layer for encapsulating the semiconductor chip, the wiring layer and the surface processing layer while exposing the second surface of the dielectric layer. Further, vias are disposed between the side surfaces of the dielectric layer and the encapsulant such that the extension pads are exposed from the vias so as for solder balls to be disposed thereon. Due to improved electrical connection between the copper and solder materials, the electrical connection quality of the package is improved.

Abstract: The present invention has provided a method for fabricating a white-light organic light-emitting diode (OLED) which allows single emitting layers and micro-molecular materials to be formed on the substrate. The white-light OLED includes a white organic emitting layer, a first electrode nearby the first surface of white organic emitting layer, and a second electrode nearby the second surface of white organic emitting layer. The white organic emitting layer is formed by mixing organic light-emitting dyes of white light combination with a micro-molecular substrate via a solution manufacturing process.

Abstract: The present invention has provided a method for fabricating a white-light organic light-emitting diode (OLED) which allows single emitting layers and micro-molecular materials to be formed on the substrate. The white-light OLED includes a white organic emitting layer, a first electrode nearby the first surface of white organic emitting layer, and a second electrode nearby the second surface of white organic emitting layer. The white organic emitting layer is formed by mixing organic light-emitting dyes of white light combination with a micro-molecular substrate via a solution manufacturing process.