Patents by Inventor Ming-Cheng Chiang

Ming-Cheng Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240132621
    Abstract: Disclosed herein an isolated neutralizing antibody, which is capable of specifically binding to chitinase-3-like protein-1 (YKL-40) and uses thereof. The neutralizing antibody can further conjugate with a metal chelator to form an antibody complex. Further, labeling the antibody complex with a radioactive metal nuclide results in formation of a radioactive antibody complex, which can be used as a contrast agent and treatment for YKL-40 over-expression-related diseases. The radioactive antibody complex can specifically bind to YKL-40, and can be used for diagnosis and the preparation of the use of the treatment for cancers related to YKL-40 over-expression.
    Type: Application
    Filed: April 18, 2023
    Publication date: April 25, 2024
    Inventors: Ming-Cheng Chang, Ping-Fang Chiang, Yu-Jen Kuo
  • Patent number: 11923392
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. A gate structure is disposed along a front-side of the substrate. A back-side of the substrate includes one or more first angled surfaces defining a central diffuser disposed over the image sensing element. The back-side of the substrate further includes second angled surfaces defining a plurality of peripheral diffusers laterally surrounding the central diffuser. The plurality of peripheral diffusers are a smaller size than the central diffuser.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Jen-Cheng Liu, Kazuaki Hashimoto, Ming-En Chen, Shyh-Fann Ting, Shuang-Ji Tsai, Wei-Chieh Chiang
  • Patent number: 9973160
    Abstract: An amplifier device includes an amplifier circuit, a feedback circuit, and a filter circuit. The amplifier circuit is configured to receive an input signal and a filtered signal, and to output a first output signal and a second output signal at a first output terminal and a second output terminal respectively. The first output signal and the second output signal are a pair of differential signals. The feedback circuit is configured to set direct current (DC) voltage levels of the first output signal and the second output signal to be at a predetermined voltage. The filter circuit is configured to low-pass filter the input signal or to low-pass filter the pair of differential signals so as to generate the filtered signal, and is configured to output the filtered signal to the amplifier circuit.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: May 15, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ming-Cheng Chiang, Yan-Yu Lin
  • Publication number: 20180109232
    Abstract: An amplifier device includes an amplifier circuit, a feedback circuit, and a filter circuit. The amplifier circuit is configured to receive an input signal and a filtered signal, and to output a first output signal and a second output signal at a first output terminal and a second output terminal respectively. The first output signal and the second output signal are a pair of differential signals. The feedback circuit is configured to set direct current (DC) voltage levels of the first output signal and the second output signal to be at a predetermined voltage. The filter circuit is configured to low-pass filter the input signal or to low-pass filter the pair of differential signals so as to generate the filtered signal, and is configured to output the filtered signal to the amplifier circuit.
    Type: Application
    Filed: October 17, 2016
    Publication date: April 19, 2018
    Inventors: Ming-Cheng Chiang, Yan-Yu Lin
  • Patent number: 9826312
    Abstract: A circuit for driving a loudspeaker is disclosed. The circuit includes: a signal generator connected to the loudspeaker, generating a first signal comprising a first pulse with positive value and a second pulse with negative value; a detection circuit connected to the loudspeaker, detecting a second signal produced by the loudspeaker in response to the first signal; and a processing circuit connected to the signal generator and the detection circuit, calculating the impedance of the loudspeaker according to the second signal; wherein each pulse width of the first and second pulses is between 100 ns and 900 ns.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: November 21, 2017
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ming-Cheng Chiang, Chia-Chi Tsai
  • Patent number: 9826305
    Abstract: An audio device includes a digital-to-analog converter, an amplifier, a speaker, a power management unit and a temperature sensor. The digital-to-analog converter is configured to convert a digital audio signal into an analog audio signal. The amplifier is coupled to the digital-to-analog converter and configured to amplify the analog audio signal and generate an amplified analog audio signal. The speaker is coupled to the amplifier and configured to broadcast the amplified analog audio signal. The power management unit is configured to provide the amplifier with a first working voltage and provide the digital-to-analog converter with a second working voltage. The temperature sensor is coupled to the speaker and configured to generate a temperature detection signal according to a temperature of the speaker. Wherein, the power management unit adjusts at least one of the first working voltage and the second working voltage according to the temperature detection signal.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: November 21, 2017
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Chang Tu, Chao-Wei Chang, Ming-Cheng Chiang
  • Patent number: 9813057
    Abstract: A sampling circuit for sampling an input voltage and generating an output voltage, comprising six switches, a capacitor and a voltage buffer. The first switch has a control terminal and makes the output voltage equal to the input voltage when switching on. The second switch is coupled to a first terminal of the capacitor and a first level. The third switch is coupled to a second terminal of the capacitor and a second level. The fourth switch is coupled to the first terminal of the capacitor and the control terminal. The fifth switch is coupled to the control terminal and the second level. The voltage buffer has large input impedance, and has an input receiving the input voltage, an output providing a voltage equal or close to the input voltage. The sixth switch is coupled to the second terminal of the capacitor and the output of the voltage buffer.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: November 7, 2017
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ming-Cheng Chiang, Li-Lung Kao
  • Publication number: 20170179949
    Abstract: A sampling circuit for sampling an input voltage and generating an output voltage, comprising six switches, a capacitor and a voltage buffer. The first switch has a control terminal and makes the output voltage equal to the input voltage when switching on. The second switch is coupled to a first terminal of the capacitor and a first level. The third switch is coupled to a second terminal of the capacitor and a second level. The fourth switch is coupled to the first terminal of the capacitor and the control terminal. The fifth switch is coupled to the control terminal and the second level. The voltage buffer has large input impedance, and has an input receiving the input voltage, an output providing a voltage equal or close to the input voltage. The sixth switch is coupled to the second terminal of the capacitor and the output of the voltage buffer.
    Type: Application
    Filed: March 1, 2017
    Publication date: June 22, 2017
    Inventors: MING-CHENG CHIANG, LI-LUNG KAO
  • Patent number: 9621157
    Abstract: A sampling circuit for sampling an input voltage and generating an output voltage, comprising six switches, a capacitor and a voltage buffer. The first switch has a control terminal and makes the output voltage equal to the input voltage when switching on. The second switch is coupled to a first terminal of the capacitor and a first level. The third switch is coupled to a second terminal of the capacitor and a second level. The fourth switch is coupled to the first terminal of the capacitor and the control terminal. The fifth switch is coupled to the control terminal and the second level. The voltage buffer has large input impedance, and has an input receiving the input voltage, an output providing a voltage equal or close to the input voltage. The sixth switch is coupled to the second terminal of the capacitor and the output of the voltage buffer.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: April 11, 2017
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ming-Cheng Chiang, Li-Lung Kao
  • Publication number: 20160173086
    Abstract: A sampling circuit for sampling an input voltage and generating an output voltage, comprising six switches, a capacitor and a voltage buffer. The first switch has a control terminal and makes the output voltage equal to the input voltage when switching on. The second switch is coupled to a first terminal of the capacitor and a first level. The third switch is coupled to a second terminal of the capacitor and a second level. The fourth switch is coupled to the first terminal of the capacitor and the control terminal. The fifth switch is coupled to the control terminal and the second level. The voltage buffer has large input impedance, and has an input receiving the input voltage, an output providing a voltage equal or close to the input voltage. The sixth switch is coupled to the second terminal of the capacitor and the output of the voltage buffer.
    Type: Application
    Filed: December 2, 2015
    Publication date: June 16, 2016
    Inventors: MING-CHENG CHIANG, LI-LUNG KAO
  • Patent number: 9287888
    Abstract: A converter with an additional DC offset includes a switch circuit, a first capacitor, a plurality of additional capacitor cells and an operational amplifier. The converter uses a first additional capacitor cell and a second additional capacitor cell having a capacitor difference with the first additional capacitor to store two charges having different polarity and magnitude with each other, and further generate an inverted DC offset according to a difference between the two charges to compensate a DC offset.
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: March 15, 2016
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ming-Cheng Chiang, Wei-Cheng Tang
  • Patent number: 9287841
    Abstract: The present invention discloses a gain control circuit capable of easing leakage current influence. According to an embodiment of the present invention, the gain control circuit comprises: at least one signal input end for receiving at least one input signal; a signal output end for outputting an output signal; an amplifier coupled between an amplifier input end and the signal output end; and a plurality of gain schemes. Each of the gain schemes is set between the at least one signal input end and the signal output end; and when one of the gain schemes is activated to generate the output signal, the rest gain schemes are inactivated to stop gain production and concurrently discharge leakage currents through their respective grounding paths.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: March 15, 2016
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ming-Cheng Chiang, Yuan-Ping Hsu, Li-Lung Kao
  • Publication number: 20150263684
    Abstract: An audio device includes a digital-to-analog converter, an amplifier, a speaker, a power management unit and a temperature sensor. The digital-to-analog converter is configured to convert a digital audio signal into an analog audio signal. The amplifier is coupled to the digital-to-analog converter and configured to amplify the analog audio signal and generate an amplified analog audio signal. The speaker is coupled to the amplifier and configured to broadcast the amplified analog audio signal. The power management unit is configured to provide the amplifier with a first working voltage and provide the digital-to-analog converter with a second working voltage. The temperature sensor is coupled to the speaker and configured to generate a temperature detection signal according to a temperature of the speaker. Wherein, the power management unit adjusts at least one of the first working voltage and the second working voltage according to the temperature detection signal.
    Type: Application
    Filed: March 11, 2015
    Publication date: September 17, 2015
    Inventors: Yi-Chang TU, Chao-Wei CHANG, Ming-Cheng CHIANG
  • Publication number: 20150194976
    Abstract: A converter with an additional DC offset and method thereof is disclosed in the present invention. The converter includes a switch circuit, a first capacitor, a plurality of additional capacitor cells and an operational amplifier. The switch circuit includes a plurality of switches. The first capacitor stores a first charge according to the switching control of the switch circuit. The plurality of additional capacitor cells includes a first additional capacitor cell and a second additional capacitor cell. There is a capacitor difference between the first additional capacitor cell and the second additional capacitor cell. The first additional capacitor cell and the second additional capacitor cell store a second charge and a third charge having different polarity and magnitude with the second charge according to the switching control of the switch circuit. The operation amplifier generates a DC bias according to the first charge wherein the DC bias includes a DC offset.
    Type: Application
    Filed: January 2, 2015
    Publication date: July 9, 2015
    Inventors: Ming-Cheng CHIANG, Wei-Cheng TANG
  • Publication number: 20150124983
    Abstract: A circuit for driving a loudspeaker is disclosed. The circuit includes: a signal generator connected to the loudspeaker, generating a first signal comprising a first pulse with positive value and a second pulse with negative value; a detection unit connected to the loudspeaker, detecting a second signal produced by the loudspeaker in response to the first signal; and a processing unit connected to the signal generator and the detection unit, calculating the impedance of the loudspeaker according to the second signal; wherein each pulse width of the first and second pulses is between 100 ns and 900 ns.
    Type: Application
    Filed: October 30, 2014
    Publication date: May 7, 2015
    Inventors: MING-CHENG CHIANG, CHIA-CHI TSAI
  • Publication number: 20150048885
    Abstract: The present invention discloses a gain control circuit capable of easing leakage current influence. According to an embodiment of the present invention, the gain control circuit comprises: at least one signal input end for receiving at least one input signal; a signal output end for outputting an output signal; an amplifier coupled between an amplifier input end and the signal output end; and a plurality of gain schemes. Each of the gain schemes is set between the at least one signal input end and the signal output end; and when one of the gain schemes is activated to generate the output signal, the rest gain schemes are inactivated to stop gain production and concurrently discharge leakage currents through their respective grounding paths.
    Type: Application
    Filed: July 17, 2014
    Publication date: February 19, 2015
    Inventors: Ming-Cheng Chiang, Yuan-Ping Hsu, Li-Lung Kao
  • Patent number: 8923466
    Abstract: A multi-phase clock switching device includes a plurality of phase selection circuits. The phase selection circuit is used to receive a plurality of phase clock signals and determine how to output the phase clock signals to generate an output signal according to a switching signal. The phase selection circuit includes a selection unit and a protection unit. The selection unit receives at least a phase clock signal and determines how to output a phase clock signal according to the at least a phase clock signal and a selection signal. The protection unit determines how to generate the selection signal according to the phase clock signal and the switching signal.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: December 30, 2014
    Assignee: Realtek Semiconductor Corp.
    Inventor: Ming-Cheng Chiang
  • Patent number: 8866656
    Abstract: Hybrid digital-to-analog converter and method thereof are provided. The hybrid digital-to-analog converter (DAC) includes a data processor, at least one first type DAC, at least one second type DAC, and an output circuit. The data processor processes an input digital signal to output at least one of first and second digital signals which are related to a higher bit portion and a lower bit portion of the input digital signal, respectively. If the data processor outputs the first digital signal to the first type DAC, the first type DAC converts the first digital signal. The at least one second type DAC receives and converts the second digital signal outputted from the data processor. The output circuit receives at least one output signal of the first and the second type DACs to output an output analog signal.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: October 21, 2014
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ming-Cheng Chiang, Li-Lung Kao
  • Publication number: 20140167993
    Abstract: Hybrid digital-to-analog converter and method thereof are provided. The hybrid digital-to-analog converter (DAC) includes a data processor, at least one first type DAC, at least one second type DAC, and an output circuit. The data processor processes an input digital signal to output at least one of first and second digital signals which are related to a higher bit portion and a lower bit portion of the input digital signal, respectively. If the data processor outputs the first digital signal to the first type DAC, the first type DAC converts the first digital signal. The at least one second type DAC receives and converts the second digital signal outputted from the data processor. The output circuit receives at least one output signal of the first and the second type DACs to output an output analog signal.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 19, 2014
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ming-Cheng Chiang, Li-Lung Kao
  • Patent number: 8577297
    Abstract: A signal transceiving circuit, comprising: a receiver, for receiving a input signal; a transmitter, for transmitting an output signal; and a resistance circuit, for omitting the noise caused by the output signal to the input signal. The resistance circuit comprises: a voltage transferring circuit, for generating a voltage transferred signal, and a voltage dividing circuit, for voltage dividing the voltage transferred signal and the output signal, such that the voltage generated at the receiver is cancelled by the voltage generated by the voltage transferred signal at the transceiver. A noise reduction circuit that can be utilized in this signal transceiving circuit is also disclosed.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: November 5, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventor: Ming-Cheng Chiang