Patents by Inventor Ming-Cheng Lee

Ming-Cheng Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170580
    Abstract: A semiconductor structure includes several semiconductor stacks over a substrate, and each of the semiconductor stacks extends in a first direction, wherein adjacent semiconductor stacks are spaced apart from each other in a second direction, which is different from the first direction. Each of the semiconductor stacks includes channel layers above the substrate and a gate structure across the channel layers. The channel layers are spaced apart from each other in the third direction. The gate structure includes gate dielectric layers around the respective channel layers, and a gate electrode along sidewalls of the gate dielectric layers and a top surface of the uppermost gate dielectric layer. The space in the third direction between the two lowermost channel layers is greater than the space in the third direction between the two uppermost channel layers in the same semiconductor stack.
    Type: Application
    Filed: January 23, 2024
    Publication date: May 23, 2024
    Applicant: MediaTek Inc.
    Inventors: Cheng-Tien Wan, Ming-Cheng Lee
  • Patent number: 11923460
    Abstract: A semiconductor structure includes several semiconductor stacks over a substrate, and each of the semiconductor stacks extends in a first direction, wherein adjacent semiconductor stacks are spaced apart from each other in a second direction, which is different from the first direction. Each of the semiconductor stacks includes channel layers above the substrate and a gate structure across the channel layers. The channel layers are spaced apart from each other in the third direction. The gate structure includes gate dielectric layers around the respective channel layers, and a gate electrode along sidewalls of the gate dielectric layers and a top surface of the uppermost gate dielectric layer. The space in the third direction between the two lowermost channel layers is greater than the space in the third direction between the two uppermost channel layers in the same semiconductor stack.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: March 5, 2024
    Assignee: MediaTek Inc.
    Inventors: Cheng-Tien Wan, Ming-Cheng Lee
  • Patent number: 11916108
    Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor fin over a substrate, and a gate structure along sidewalls and the top surface of the semiconductor fin. The gate structure covers the first portion of the semiconductor fin. The semiconductor device also includes a source/drain feature adjacent to the gate structure. The semiconductor device further includes a source/drain contact connected to the source/drain feature. The source/drain contact extends downwards to a position that is lower than the top surface of the first portion of the semiconductor fin.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: February 27, 2024
    Assignee: MediaTek Inc.
    Inventors: Cheng-Tien Wan, Ming-Cheng Lee
  • Publication number: 20240019491
    Abstract: A die-level electrical parameter extraction method includes: obtaining electrical parameters of a plurality of transistor types; obtaining measurement results of a plurality of logic blocks; estimating a mapping relationship between the electrical parameters of the plurality of transistor types and the measurement results of the plurality of logic blocks; and regarding a specific die of a wafer, obtaining die-level measurement of the plurality of logic blocks, and generating die-level electrical parameters of the plurality of transistor types according to the mapping relationship and the die-level measurement results.
    Type: Application
    Filed: June 7, 2023
    Publication date: January 18, 2024
    Applicant: MEDIATEK INC.
    Inventors: Jia-Horng Shieh, Po-Chao Tsao, Ming-Cheng Lee, Tung-Hsing Lee, Chi-Ming Lee, Yi-Ju Ting
  • Patent number: 11744242
    Abstract: A living body specimen transport device for receiving multiple living body specimens has a frame, a rotating bracket, and a storage assembly. The rotating bracket can be rotated with respect to the frame. The storage assembly can receive a container with a living body specimen and be rotated with respect to the rotating bracket. A center of gravity of the storage assembly is lower than a pivoting point where the rotating bracket is mounted on the frame and a pivoting point where the storage assembly is mounted on the rotating bracket. With such structure, even when the living body specimen transport device is vibrated and shaken during transporting and then the frame of the living body specimen transport device is tilted or turned over, the rotating bracket and the storage assembly can rotate to be vertical by themselves, which keeps the living body specimen being soaked in the preservation solution.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: September 5, 2023
    Assignee: DRSIGNAL BIOTECHNOLOGY CO., LTD.
    Inventors: Hsin-Wu Mi, Ming-Cheng Lee, Jen-Sheng Hsu
  • Publication number: 20230178607
    Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor fin over a substrate, and a gate structure along sidewalls and the top surface of the semiconductor fin. The gate structure covers the first portion of the semiconductor fin. The semiconductor device also includes a source/drain feature adjacent to the gate structure. The semiconductor device further includes a source/drain contact connected to the source/drain feature. The source/drain contact extends downwards to a position that is lower than the top surface of the first portion of the semiconductor fin.
    Type: Application
    Filed: January 30, 2023
    Publication date: June 8, 2023
    Applicant: Media Tek Inc.
    Inventors: Cheng-Tien Wan, Ming-Cheng Lee
  • Patent number: 11600700
    Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor fin over a substrate, and a gate structure along sidewalls and the top surface of the semiconductor fin. The gate structure covers the first portion of the semiconductor fin. The semiconductor device also includes a source/drain feature adjacent to the gate structure. The semiconductor device further includes a source/drain contact connected to the source/drain feature. The source/drain contact extends downwards to a position that is lower than the top surface of the first portion of the semiconductor fin.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: March 7, 2023
    Assignee: MediaTek Inc.
    Inventors: Cheng-Tien Wan, Ming-Cheng Lee
  • Publication number: 20230061138
    Abstract: A semiconductor device structure includes a semiconductor substrate, a first device formed in the first region of the semiconductor substrate and a second device formed in the second region of the semiconductor substrate. The first device includes a first gate structure on the semiconductor substrate. The first gate structure includes a first gate dielectric layer on the semiconductor substrate and a first gate layer on the first gate dielectric layer. The second device includes a second gate structure on the semiconductor substrate. The second gate structure includes a second gate dielectric layer on the semiconductor substrate and a second gate layer on the second gate dielectric layer. The first gate dielectric layer of the first device and the second gate dielectric layer of the second device have different dielectric material compositions.
    Type: Application
    Filed: August 2, 2022
    Publication date: March 2, 2023
    Inventors: Yu-Lin YANG, Ming-Cheng LEE, Yuan-Fu CHUNG
  • Publication number: 20220406921
    Abstract: A semiconductor chip includes a substrate and a transistor. The transistor is formed on the substrate and includes an insulation layer and a fin. The fin includes a base portion and a protrusion connected with the base portion, wherein the protrusion is projected with respect to an upper surface of the base portion and has a recess recessed with respect to the upper surface.
    Type: Application
    Filed: August 22, 2022
    Publication date: December 22, 2022
    Inventors: Cheng-Tien WAN, Yao-Tsung HUANG, Yun-San HUANG, Ming-Cheng LEE, Wei-Che HUANG
  • Publication number: 20220336680
    Abstract: A semiconductor structure includes several semiconductor stacks over a substrate, and each of the semiconductor stacks extends in a first direction, wherein adjacent semiconductor stacks are spaced apart from each other in a second direction, which is different from the first direction. Each of the semiconductor stacks includes channel layers above the substrate and a gate structure across the channel layers. The channel layers are spaced apart from each other in the third direction. The gate structure includes gate dielectric layers around the respective channel layers, and a gate electrode along sidewalls of the gate dielectric layers and a top surface of the uppermost gate dielectric layer. The space in the third direction between the two lowermost channel layers is greater than the space in the third direction between the two uppermost channel layers in the same semiconductor stack.
    Type: Application
    Filed: June 28, 2022
    Publication date: October 20, 2022
    Applicant: MediaTek Inc.
    Inventors: Cheng-Tien Wan, Ming-Cheng Lee
  • Patent number: 11450756
    Abstract: A semiconductor chip includes a substrate and a transistor. The transistor is formed on the substrate and includes an insulation layer and a fin. The fin includes a base portion and a protrusion connected with the base portion, wherein the protrusion is projected with respect to an upper surface of the base portion and has a recess recessed with respect to the upper surface.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: September 20, 2022
    Assignee: MEDIATEK INC.
    Inventors: Cheng-Tien Wan, Yao-Tsung Huang, Yun-San Huang, Ming-Cheng Lee, Wei-Che Huang
  • Patent number: 11404587
    Abstract: A semiconductor structure includes several semiconductor stacks over a substrate, and each of the semiconductor stacks extends in a first direction, wherein adjacent semiconductor stacks are spaced apart from each other in a second direction, which is different from the first direction. Each of the semiconductor stacks includes channel layers above the substrate and a gate structure across the channel layers. The channel layers are spaced apart from each other in the third direction. The gate structure includes gate dielectric layers around the respective channel layers, and a gate electrode along sidewalls of the gate dielectric layers and a top surface of the uppermost gate dielectric layer. The space in the third direction between the two lowermost channel layers is greater than the space in the third direction between the two uppermost channel layers in the same semiconductor stack.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: August 2, 2022
    Assignee: MediaTek Inc.
    Inventors: Cheng-Tien Wan, Ming-Cheng Lee
  • Publication number: 20220079141
    Abstract: A living body specimen transport device for receiving multiple living body specimens has a frame, a rotating bracket, and a storage assembly. The rotating bracket can be rotated with respect to the frame. The storage assembly can receive a container with a living body specimen and be rotated with respect to the rotating bracket. A center of gravity of the storage assembly is lower than a pivoting point where the rotating bracket is mounted on the frame and a pivoting point where the storage assembly is mounted on the rotating bracket. With such structure, even when the living body specimen transport device is vibrated and shaken during transporting and then the frame of the living body specimen transport device is tilted or turned over, the rotating bracket and the storage assembly can rotate to be vertical by themselves, which keeps the living body specimen being soaked in the preservation solution.
    Type: Application
    Filed: September 17, 2020
    Publication date: March 17, 2022
    Inventors: Hsin-Wu Mi, Ming-Cheng Lee, Jen-Sheng Hsu
  • Publication number: 20220052160
    Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor fin over a substrate, and a gate structure along sidewalls and the top surface of the semiconductor fin. The gate structure covers the first portion of the semiconductor fin. The semiconductor device also includes a source/drain feature adjacent to the gate structure. The semiconductor device further includes a source/drain contact connected to the source/drain feature. The source/drain contact extends downwards to a position that is lower than the top surface of the first portion of the semiconductor fin.
    Type: Application
    Filed: October 28, 2021
    Publication date: February 17, 2022
    Applicant: MediaTek Inc.
    Inventors: Cheng-Tien Wan, Ming-Cheng Lee
  • Patent number: 11189694
    Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor fin over a substrate, and a gate structure along sidewalls and the top surface of the semiconductor fin. The gate structure covers the first portion of the semiconductor fin. The semiconductor device also includes a source/drain feature adjacent to the gate structure. The semiconductor device further includes a source/drain contact connected to the source/drain feature. The source/drain contact extends downwards to a position that is lower than the top surface of the first portion of the semiconductor fin.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: November 30, 2021
    Assignee: MediaTek Inc.
    Inventors: Cheng-Tien Wan, Ming-Cheng Lee
  • Patent number: 11142733
    Abstract: A culture flask has a flask body. The flask body has two translucent planes, one opening end, one recess end and at least one collecting recess. Both translucent planes are located on the opposite ends of the flask body. A collecting recess is formed on the inner surface of the recess end, while the cross sectional area of the recess end gradually decreases toward the bottom of the collecting recess. By forming a collecting recess with decreased cross sectional area, culture cells can be collected inside the bottom after centrifugation, and therefore the user no longer has to transfer the culture cells and culture medium to a centrifuge tube when replacing culture medium. Consumption of suction tube and centrifuge tube can be avoided, the time to replace the culture medium is reduced, and also the risk of contamination when replacing the culture medium is reduced.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: October 12, 2021
    Assignee: SCL BIOTECH LTD.
    Inventors: Hsin-Wu Mi, Ming-Cheng Lee
  • Patent number: 11120936
    Abstract: A magnetic component module includes a magnetic core group, a first winding, a second winding, and a third winding. The magnetic core group includes a first magnetic core, a second magnetic core disposed corresponding to the first magnetic core, and a third magnetic core disposed corresponding to the second magnetic core. The second magnetic core is placed between the first magnetic core and the third magnetic core. The first winding and the second winding are placed between the first magnetic core and the second magnetic core. The third winding is placed in the third magnetic core. The first magnetic core, the second magnetic core, the first winding, and the second winding together constitute a transformer. The third magnetic core and the third winding constitute an inductive component. Therefore, less components are used, manufacturing is simplified, and production costs are reduced.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: September 14, 2021
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Hsin-Wei Tsai, Hua-Sheng Lin, Ming-Cheng Lee
  • Publication number: 20210135016
    Abstract: A semiconductor structure includes several semiconductor stacks over a substrate, and each of the semiconductor stacks extends in a first direction, wherein adjacent semiconductor stacks are spaced apart from each other in a second direction, which is different from the first direction. Each of the semiconductor stacks includes channel layers above the substrate and a gate structure across the channel layers. The channel layers are spaced apart from each other in the third direction. The gate structure includes gate dielectric layers around the respective channel layers, and a gate electrode along sidewalls of the gate dielectric layers and a top surface of the uppermost gate dielectric layer. The space in the third direction between the two lowermost channel layers is greater than the space in the third direction between the two uppermost channel layers in the same semiconductor stack.
    Type: Application
    Filed: September 18, 2020
    Publication date: May 6, 2021
    Inventors: Cheng-Tien WAN, Ming-Cheng LEE
  • Publication number: 20200388700
    Abstract: A semiconductor chip includes a substrate and a transistor. The transistor is formed on the substrate and includes an insulation layer and a fin. The fin includes a base portion and a protrusion connected with the base portion, wherein the protrusion is projected with respect to an upper surface of the base portion and has a recess recessed with respect to the upper surface.
    Type: Application
    Filed: August 25, 2020
    Publication date: December 10, 2020
    Inventors: Cheng-Tien WAN, Yao-Tsung HUANG, Yun-San HUANG, Ming-Cheng LEE, Wei-Che HUANG
  • Patent number: 10835896
    Abstract: Provided are a cell dispensing and storing apparatus and a method of the same. The method includes: moving a freezing container with a test tube in it and a temporary storage bottle containing sample cells into a dispensing area. Connect the temporary storage bottle with an injecting assembly. A dispensing clamp moves the test tube from the freezing container to a tube rack on a rotating platform. A rotating clamp removes a tube cover from the test tube. An injecting nozzle extracts the sample cells from the temporary storage bottle and dispenses the sample cells into the test tube. The rotating clamp puts the tube cover back on the test tube. The dispensing clamp moves the test tube back into the freezing container. A freezing clamp moves the freezing container into a freezer.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: November 17, 2020
    Assignee: SCL BIOTECH LTD.
    Inventors: Hsin-Wu Mi, Ming-Cheng Lee