Patents by Inventor Ming-Cheng Lo

Ming-Cheng Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200348338
    Abstract: A test pin contact buffer, fixed to a test pin base, is a sheet-like structure made of a composite material including a conductive material and an insulating material, and defines at least one contact area corresponding to at least one test pin of the test pin base. The contact area has at least one cutout hole, an insulating deformation structure and a conductive head structure. The insulating deformation structure is extendable and made of the insulating material and extends outward from the conductive head structure. The cutout hole enables the contact area to be in a partial hollow state, which is beneficial for deformation of the insulating deformation structure. The test pin can be used for performing measurement in an indirect manner, reducing the wear of the test pin, prolonging the service life, and improving the measurement speed and efficiency.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Inventors: MING-DAO WU, SHIH-HUNG LO, FU-CHENG CHUANG, ZHAO-YUAN TSAI, HAO-WEN CHIEN, BOR-CHEN TSAI, CHIH-FENG CHEN
  • Publication number: 20200348339
    Abstract: Disclosed are a supplementary bushing, a test probe, and a supplementary testing device. The supplementary bushing has a closed end, an open end, a receiving groove, and at least one first fixing portion. The closed end has a first contact, and the receiving groove is concavely formed from an open end towards the closed end. The first fixing portion is disposed on an inner surface of the receiving groove. The test probe is installed in the receiving hole of a base of the supplementary testing device and has a testing end and a connecting end. The testing end has a second contact, a second fixing portion and a stop portion.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Inventors: MING-DAO WU, SHIH-HUNG LO, HAO-WEN CHIEN, FU-CHENG CHUANG, WEI-CHU CHEN, KUO-WEI CHANG, BOR-CHEN TSAI, CHIH-FENG CHEN
  • Publication number: 20200303441
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.
    Type: Application
    Filed: March 22, 2019
    Publication date: September 24, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chung-Ren LAO, Chih-Cherng LIAO, Shih-Hao LIU, Wu-Hsi LU, Ming-Cheng LO, Wei-Lun CHUNG, Chih-Wei LIN
  • Patent number: 10784375
    Abstract: A device including a gate stack over a semiconductor substrate having a pair of spacers abutting sidewalls of the gate stack. A recess is formed in the semiconductor substrate adjacent the gate stack. The recess has a first profile having substantially vertical sidewalls and a second profile contiguous with and below the first profile. The first and second profiles provide a bottle-neck shaped profile of the recess in the semiconductor substrate, the second profile having a greater width within the semiconductor substrate than the first profile. The recess is filled with a semiconductor material. A pair of spacers are disposed overly the semiconductor substrate adjacent the recess.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: September 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Eric Peng, Chao-Cheng Chen, Chii-Horng Li, Ming-Hua Yu, Shih-Hao Lo, Syun-Ming Jang, Tze-Liang Lee, Ying Hao Hsieh
  • Patent number: 10763572
    Abstract: An antenna module is provided. The antenna module includes a circuit board, a conductive layer, and a spiral coil. The circuit board has a first surface and a second surface opposite to each other. The circuit board further includes a first block and a second block connected to each other. The conductive layer is disposed on the first block. The spiral coil is disposed in the second block of the circuit board. The conductive layer at least partially surrounds the spiral coil.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: September 1, 2020
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chien-Hung Tsai, Kuo-Chu Liao, Wei-Cheng Lo, Te-Li Lien, Hsuan-Chi Tsai, Ming-Shan Wu, Yung-Chieh Yu
  • Publication number: 20200235783
    Abstract: An electronic device is disclosed. The electronic device includes a conductive plate, an opening, two feeding parts, and an electronic assembly. The opening is disposed at a side of the conductive plate. The opening has a first side and a second side opposite to each other, and the first side and the second side are connected with the side of the conductive plate. The electronic assembly is located in the opening. Two feeding parts are respectively disposed on the first side and the second side of the opening. the feeding parts is used to receive a feeding signal, and the feeding signal is transmitted along the first side of the opening to the second side of the opening and generates a near field magnetic field.
    Type: Application
    Filed: January 2, 2020
    Publication date: July 23, 2020
    Inventors: Chien-Hung TSAI, Kuo-Chu LIAO, Wei-Cheng LO, Te-Li LIEN, Ming-Shan WU
  • Patent number: 10692725
    Abstract: A method includes providing a substrate; forming mandrel patterns over the substrate; and forming spacers on sidewalls of the mandrel patterns. The method further includes removing the mandrel patterns, thereby forming trenches that are at least partially surrounded by the spacers. The method further includes depositing a copolymer material in the trenches, wherein the copolymer material is directed self-assembling; and inducing microphase separation within the copolymer material, thereby defining a first constituent polymer surrounded by a second constituent polymer. The mandrel patterns have restricted sizes and a restricted configuration. The first constituent polymer includes cylinders arranged in a rectangular or square array.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: June 23, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Huei Weng, Kuan-Hsin Lo, Wei-Liang Lin, Chi-Cheng Hung
  • Patent number: 10632081
    Abstract: Disclosed is an intralymphatic delivery method for treating lymphatic cancer using hyaluronan nanoparticles. These nanoparticles include a hyaluronic acid derivative and a platinum compound. The hyaluronan derivative includes hyaluronic acid, modified histidine and optionally one or more of a polymer or a C4-C20 alkyl. The hyaluronic acid derivative may include linking group(s) that connect the polymer or the C4-C20 alkyl to the hyaluronic acid. The platinum compound includes dichloro(1,2-diaminocyclohexane) platinum (DACHPt), cisplatin and oxaliplatin. This intralymphatic delivery method offers significant advantages for the use of platinum medicines in treating lymphatic cancer.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: April 28, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Peng Liu, Ya-Chin Lo, Ming-Cheng Wei, Maggie Lu, Shuen-Hsiang Chou, Shih-Ta Chen, Hsiang-Wen Tseng
  • Publication number: 20200105596
    Abstract: In a method of manufacturing a semiconductor device, initial connection patterns are prepared, initial cutting patterns for cutting the initial connection patterns are prepared, non-functional connection patterns at least from the initial connection patterns are identified, final cutting patterns are prepared from the initial cutting patterns and the non-functional connection patterns, a photo mask is prepared from the final cutting patterns, a photo resist pattern is formed over a target layer by a lithography operation using the photo mask, the target layer is patterned to form openings in the target layer by using the photo resist pattern, and connection layers are formed by filling the openings with a conductive material.
    Type: Application
    Filed: August 27, 2019
    Publication date: April 2, 2020
    Inventors: Yuan-Yen LO, Chia-Cheng CHANG, Ming-Jhih KUO, Chien-Yuan CHEN
  • Publication number: 20200098919
    Abstract: A device including a gate stack over a semiconductor substrate having a pair of spacers abutting sidewalls of the gate stack. A recess is formed in the semiconductor substrate adjacent the gate stack. The recess has a first profile having substantially vertical sidewalls and a second profile contiguous with and below the first profile. The first and second profiles provide a bottle-neck shaped profile of the recess in the semiconductor substrate, the second profile having a greater width within the semiconductor substrate than the first profile. The recess is filled with a semiconductor material. A pair of spacers are disposed overly the semiconductor substrate adjacent the recess.
    Type: Application
    Filed: November 26, 2019
    Publication date: March 26, 2020
    Inventors: Eric PENG, Chao-Cheng CHEN, Chii-Horng LI, Ming-Hua YU, Shih-Hao LO, Syun-Ming JANG, Tze-Liang LEE, Ying Hao HSIEH
  • Patent number: 10572070
    Abstract: An optical device is provided. The optical device includes a substrate including a plurality of pixel units, a dielectric layer disposed on the substrate, a patterned light-transmitting layer disposed on the dielectric layer and corresponding to the plurality of pixel units, and a plurality of continuous light-shielding layers disposed on the dielectric layer and located on both sides of the patterned light-transmitting layer. A method for fabricating an optical device is also provided.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: February 25, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chih-Cherng Liao, Shih-Hao Liu, Wu-Hsi Lu, Ming-Cheng Lo, Chung-Ren Lao, Yun-Chou Wei, Yin Chen, Hsin-Hui Lee, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
  • Publication number: 20200056245
    Abstract: Cell-free DNA fragments often include jagged ends, where one end of one strand of double-stranded DNA extends beyond the other end of the other strand. The length and amount of these jagged ends may be used to determine a level of a condition of an individual, a fractional concentration of clinically-relevant DNA in a biological sample, an age of individual, or a tissue type exhibiting cancer. The jagged end length and amount may be determined using various techniques described herein.
    Type: Application
    Filed: July 23, 2019
    Publication date: February 20, 2020
    Inventors: Yuk-Ming Dennis Lo, Rossa Wai Kwun Chiu, Kwan Chee Chan, Peiyong Jiang, Suk Hang Cheng
  • Patent number: 10521895
    Abstract: The present invention provides a dynamic automatic focus tracking system, comprising an image capturing device for capturing an image of a workpiece in a target picture-taking region; a driving device for adjusting a spacing between the image capturing device and the workpiece; and a focal length adjustment module coupled to the image capturing device and the driving device to generate a control signal according to a figure feature and a predefined figure feature in the image of the workpiece and send the control signal to the driving device, thereby adjusting a position of the image capturing device with the driving device.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: December 31, 2019
    Assignee: Utechzone Co., Ltd.
    Inventors: Hung-Ju Tsai, Chia-Liang Lu, Ming-Cheng Lai, Sheng-Chieh Lo
  • Publication number: 20190391701
    Abstract: An optical device is provided. The optical device includes a substrate including a plurality of pixel units, a dielectric layer disposed on the substrate, a patterned light-transmitting layer disposed on the dielectric layer and corresponding to the plurality of pixel units, and a plurality of continuous light-shielding layers disposed on the dielectric layer and located on both sides of the patterned light-transmitting layer. A method for fabricating an optical device is also provided.
    Type: Application
    Filed: June 25, 2018
    Publication date: December 26, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chih-Cherng LIAO, Shih-Hao LIU, Wu-Hsi LU, Ming-Cheng LO, Chung-Ren LAO, Yun-Chou WEI, Yin CHEN, Hsin-Hui LEE, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Patent number: 7977666
    Abstract: The present invention is disclosed that a device capable of normal incident detection of infrared light to efficiently convert infrared light into electric signals. The device includes a substrate, a first contact layer formed on the substrate, an active layer formed on the first contact layer, a barrier layer formed on the active layer and a second contact layer formed on the barrier layer, wherein the active layer includes multiple quantum dot layers.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: July 12, 2011
    Assignee: Academia Sinica
    Inventors: Shiang-Yu Wang, Hong-Shi Ling, Ming-Cheng Lo, Chien-Ping Lee
  • Publication number: 20110076794
    Abstract: A method of making a vertically structured light emitting diode includes: providing a sacrificial substrate having first and second portions; forming a first buffer layer on a surface of the sacrificial substrate; forming a second buffer layer on a surface of the first buffer layer; forming a light emitting unit on a surface of the second buffer layer; forming a device substrate on a surface of the light emitting unit; etching the first portion of the sacrificial substrate such that the second portion of the sacrificial substrate remains on the first buffer layer; dry-etching the second portion of the sacrificial substrate; dry-etching the first buffer layer; and etching the second buffer layer. An etch rate of a material of the second buffer layer is lower than an etch rate of a material of the first buffer layer.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 31, 2011
    Inventors: Ming-Cheng Lo, Hung-Jen Chen, Juh-Yuh Su
  • Publication number: 20100117060
    Abstract: The present invention is disclosed that a device capable of normal incident detection of infrared light to efficiently convert infrared light into electric signals. The device comprises a substrate, a first contact layer formed on the substrate, an active layer formed on the first contact layer, a barrier layer formed on the active layer and a second contact layer formed on the barrier layer, wherein the active layer comprises multiple quantum dot layers.
    Type: Application
    Filed: April 29, 2009
    Publication date: May 13, 2010
    Applicant: Academia Sinica
    Inventors: Shiang-Yu Wang, Hong-Shi Ling, Ming-Cheng Lo, Chien-Ping Lee