Abstract: A method includes forming a photodiode in a substrate and forming source and drain regions in the substrate. A first rapid thermal anneal (RTA) process is performed to anneal the source and drain regions in the substrate. After forming the source and drain regions, a thermal oxide layer is grown over the photodiode by performing a second RTA process. A thickness of the thermal oxide layer is limited to a thickness required to enclose a damaged portion of a surface of the photodiode.

Abstract: A method includes forming a photodiode in a substrate and forming source and drain regions in the substrate. A first rapid thermal anneal (RTA) process is performed to anneal the source and drain regions in the substrate. After forming the source and drain regions, a thermal oxide layer is grown over the photodiode by performing a second RTA process. A thickness of the thermal oxide layer is limited to a thickness required to enclose a damaged portion of a surface of the photodiode.

Abstract: Methods and systems for forming a photodiode in a substrate, forming a source/drain region in the substrate and extending over at least a portion of the photodiode, and growing a thermal oxide layer over the photodiode by performing a rapid thermal anneal (RTA) process utilizing an oxidizing environment.

Abstract: A method for forming a SiGe epitaxial layer is described. A first SEG process is performed under a first condition, consuming about 1% to 20% of the total process time for forming the SiGe epitaxial layer. Then, a second SEG process is performed under a second condition, consuming about 99% to 80% of the total process time. The first condition and the second condition include different temperatures or pressures. The first and the second SEG processes each uses a reactant gas that includes at least a Si-containing gas and a Ge-containing gas.

Abstract: Methods and systems for forming a photodiode in a substrate, forming a source/drain region in the substrate and extending over at least a portion of the photodiode, and growing a thermal oxide layer over the photodiode by performing a rapid thermal anneal (RTA) process utilizing an oxidizing environment.

Abstract: A complementary metal-oxide-semiconductor (CMOS) device includes a substrate with a first active region and a second active region; a first gate structure and a second gate structure, respectively disposed on the first active region and the second active region; a first spacer structure and a second spacer structure respectively disposed on sidewalls of the first gate structure and the second gate structure; a first LDD and a second LDD respectively disposed in the substrate at both sides of the first gate structure and the second gate structure; an epitaxial material layer, disposed in the first active region and located on a side of the first LDD; and a passivation layer, disposed on the first gate structure, the first spacer structure, and the first LDD and covering the second active region, wherein the passivation layer comprises a carbon-containing oxynitride layer.

Abstract: A complementary metal-oxide-semiconductor (CMOS) device includes a substrate with a first active region and a second active region; a first gate structure and a second gate structure, respectively disposed on the first active region and the second active region; a first spacer structure and a second spacer structure respectively disposed on sidewalls of the first gate structure and the second gate structure; a first LDD and a second LDD respectively disposed in the substrate at both sides of the first gate structure and the second gate structure; an epitaxial material layer, disposed in the first active region and located on a side of the first LDD; and a passivation layer, disposed on the first gate structure, the first spacer structure, and the first LDD and covering the second active region, wherein the passivation layer comprises a carbon-containing oxynitride layer.

Abstract: A method for forming a SiGe epitaxial layer is described. A first SEG process is performed under a first condition, consuming about 1% to 20% of the total process time for forming the SiGe epitaxial layer. Then, a second SEG process is performed under a second condition, consuming about 99% to 80% of the total process time. The first condition and the second condition include different temperatures or pressures. The first and the second SEG processes each uses a reactant gas that includes at least a Si-containing gas and a Ge-containing gas.

Abstract: A complementary metal-oxide-semiconductor (CMOS) device includes a substrate with a first active region and a second active region; a first gate structure and a second gate structure, respectively disposed on the first active region and the second active region; a first spacer structure and a second spacer structure respectively disposed on sidewalls of the first gate structure and the second gate structure; a first LDD and a second LDD respectively disposed in the substrate at both sides of the first gate structure and the second gate structure; an epitaxial material layer, disposed in the first active region and located on a side of the first LDD; and a passivation layer, disposed on the first gate structure, the first spacer structure, and the first LDD and covering the second active region, wherein the passivation layer comprises a carbon-containing oxynitride layer.