Abstract: Stress regulated semiconductor devices and associated methods are provided. In one aspect, for example, a stress regulated semiconductor device can include a semiconductor layer, a stress regulating interface layer including a carbon layer formed on the semiconductor layer, and a heat spreader coupled to the carbon layer opposite the semiconductor layer. The stress regulating interface layer is operable to reduce the coefficient of thermal expansion difference between the semiconductor layer and the heat spreader to less than or equal to about 10 ppm/° C.

Abstract: Stress regulated semiconductor devices and associated methods are provided. In one aspect, for example, a stress regulated semiconductor device can include a semiconductor layer, a stress regulating interface layer including a carbon layer formed on the semiconductor layer, and a heat spreader coupled to the carbon layer opposite the semiconductor layer. The stress regulating interface layer is operable to reduce the coefficient of thermal expansion difference between the semiconductor layer and the heat spreader to less than or equal to about 10 ppm/° C.

Abstract: Stress regulated semiconductor devices and associated methods are provided. In one aspect, for example, a stress regulated semiconductor device can include a semiconductor layer, a stress regulating interface layer including a carbon layer formed on the semiconductor layer, and a heat spreader coupled to the carbon layer opposite the semiconductor layer. The stress regulating interface layer is operable to reduce the coefficient of thermal expansion difference between the semiconductor layer and the heat spreader to less than or equal to about 10 ppm/° C.

Abstract: Stress regulated semiconductor devices and associated methods are provided. In one aspect, for example, a stress regulated semiconductor device can include a semiconductor layer, a stress regulating interface layer including a carbon layer formed on the semiconductor layer, and a heat spreader coupled to the carbon layer opposite the semiconductor layer. The stress regulating interface layer is operable to reduce the coefficient of thermal expansion difference between the semiconductor layer and the heat spreader to less than or equal to about 10 ppm/° C.

Abstract: The present invention relates to a method for manufacturing a substrate, including: providing a metal base; forming an oxide layer on one surface of the metal base; forming a chemical barrier layer on the oxide layer; forming an intermediate layer on the chemical barrier layer; forming a first metal layer on the intermediate layer; and removing parts of the intermediate layer and the first metal layer by etching to form a first metal wiring layer. Moreover, the present invention may include the following steps alternatively: laminating an insulating adhesive layer and a second metal layer on an exposed area of the chemical barrier layer; forming a second metal wiring layer by etching a part of the second metal layer; forming a surface metal layer; and forming a chip layer on the surface metal layer. The present invention also provides a structure of a substrate obtained according to the aforementioned method.

Abstract: Electrical substrates having low current leakage and high thermal conductivity, including associated methods, are provided. In one aspect for example, a multilayer substrate having improved thermal conductivity and dielectric properties can include a metal layer having a working surface with a local Ra of greater than about 0.1 micron, a dielectric layer coated on the working surface of the metal layer, and a thermally conductive insulating layer disposed on the dielectric layer, wherein the multilayer substrate has a minimum resistivity between the metal layer and the thermally conductive insulating layer across all of the working surface of at least 1×106 ohms.

Abstract: A highly thermal conductive circuit board includes a composite substrate, and a metal layer, an insulating layer, and a conductor layer sequentially disposed on the composite substrate. When at least one electronic element is electrically disposed on the conductor layer of the highly thermal conductive circuit board, heat produced by the electronic element in operation is rapidly dissipated through characteristics such as a high thermal conductivity and a low thermal expansion coefficient of the highly thermal conductive circuit board.

Abstract: The present invention relates a packaging carrier with high heat dissipation for packaging a chip, comprising: a carrier body, an interfacial metal layer, at least one diamond-like carbon thin film, a plated layer, and an electrode layer. Herein, the packaging carrier further comprises through holes. The present invention further discloses a method for manufacturing the aforementioned packaging carrier, comprising: providing a carrier body; forming an interfacial metal layer on the upper surface of the carrier body; forming a diamond-like carbon thin film on the interfacial metal layer; forming a plated layer on the diamond-like carbon thin film; forming an electrode layer on the lower surface of the carrier body; and forming through holes extending through all or part of the aforementioned elements. The present invention uses a diamond-like carbon thin film and through holes for heat dissipation in three dimensions to improve heat dissipation of an electronic device.

Abstract: Method for production of diamond-like carbon film having semiconducting properties comprises preparing a boron-doped diamond-like carbon (B-DLC) thin film on a silicon substrate through a radio frequency magnetron sputtering process, wherein a composite target material formed by inserting boron tablet as a dopant source in a graphite target is used. After forming a boron-containing diamond-like carbon film, the thin film is annealed at a temperature of 500° C. and kept at this temperature for 10 minutes, and determine its carrier concentration and resistivity. Thus demonstrated that the polarity of said boron-doped diamond-like carbon film is p-type semiconductor characteristic. Carrier concentration can be up to 1.3×1018 cm-3, and its resistivity is about 0.6 ?-cm; consequently.

Abstract: A circuit board having high thermal conductivity comprises a substrate, a plurality of thermal conductive insulating layers, a patterned electrical conductive layer, a plurality of through-holes and a soldering layer. The substrate has an upper surface and a lower surface; the thermal conductive insulating layers are respectively formed on the upper surface and the lower surface of the substrate. The patterned electrical conductive layer is disposed on the surfaces of the thermal conductive insulating layers. The plurality of through-holes are extended through the substrate and electrically connected to the patterned electrical conductive layer, and the soldering layer is partially formed on the patterned electric conductive layer. The present invention also discloses a method for manufacturing the circuit board as above-mentioned.

Abstract: A support substrate structure for supporting an electronic component thereon comprises a thermal conductive substrate, a first ceramic layer, an insulating thermal conductive layer and a conductive pattern. The thermal conductive substrate has an upper surface and a lower surface; the first ceramic layer is disposed on the upper surface of the thermal conductive substrate; the insulating thermal conductive layer is disposed on the first ceramic layer; and the conductive pattern is formed on a surface of the insulating thermal conductive layer. The present invention also discloses a method for fabricating the aforementioned support substrate structure.

Abstract: The present invention relates a packaging carrier with high heat dissipation for packaging a chip, comprising: a carrier body, an interfacial metal layer, at least one diamond-like carbon thin film, a plated layer, and an electrode layer. Herein, the packaging carrier further comprises through holes. The present invention further discloses a method for manufacturing the aforementioned packaging carrier, comprising: providing a carrier body; forming an interfacial metal layer on the upper surface of the carrier body; forming a diamond-like carbon thin film on the interfacial metal layer; forming a plated layer on the diamond-like carbon thin film; forming an electrode layer on the lower surface of the carrier body; and forming through holes extending through all or part of the aforementioned elements. The present invention uses a diamond-like carbon thin film and through holes for heat dissipation in three dimensions to improve heat dissipation of an electronic device.

Abstract: Methods and devices for cooling printed circuit boards having at least one heat source are disclosed and described. Such a device may include a dielectric layer disposed onto a surface of a substrate. The dielectric layer may include a plurality of carbonaceous particles disposed in a dielectric material. In one aspect, the carbonaceous particles may be diamond particles. Furthermore, a circuit including a heat source may be disposed onto a surface of the dielectric layer opposite to the substrate such that the circuit is thermally coupled to the dielectric layer. Additionally, the dielectric layer may be configured to accelerate heat generated by the heat source away from the heat source.

Abstract: Methods and devices for cooling printed circuit boards having at least one heat source are disclosed and described. The method can include coating a layer of diamond-like carbon (DLC) over at least a portion of the printed circuit board in order to accelerate movement of heat away from the heat source. Various heat sources may be present on a printed circuit board. In one aspect, the heat source can be an active heat source such as a heat-generating electronic component.