Abstract: The disclosure provides an eye state assessment method and an electronic device. The method includes: obtaining an optic disc image area from a first fundus photography and generating multiple optic cup-to-disc ratio assessment results by multiple first models based on the optic disc image area; obtaining a first assessment result of an eye based on the optic cup-to-disc ratio assessment results; performing multiple data augmentation operations on the first fundus photography to generate multiple second fundus photographies; generating multiple retinal nerve fiber layer (RNFL) defect assessment results by multiple second models based on the second fundus photographies; obtaining a second assessment result of the eye based on the RNFL defect assessment results; and obtaining an optic nerve assessment result of the eye based on the first assessment result and the second assessment result.

Abstract: The disclosure provides an eye state assessment method and an electronic device. The method includes: obtaining an optic disc image area from a first fundus photography and generating multiple optic cup-to-disc ratio assessment results by multiple first models based on the optic disc image area; obtaining a first assessment result of an eye based on the optic cup-to-disc ratio assessment results; performing multiple data augmentation operations on the first fundus photography to generate multiple second fundus photographies; generating multiple retinal nerve fiber layer (RNFL) defect assessment results by multiple second models based on the second fundus photographies; obtaining a second assessment result of the eye based on the RNFL defect assessment results; and obtaining an optic nerve assessment result of the eye based on the first assessment result and the second assessment result.

Abstract: A high voltage bootstrap gate driving apparatus is provided. The gate driving apparatus includes a high-end transistor, a low-end transistor, a buffer, a boost capacitor, and a high voltage depletion transistor. The high-end transistor receives a first power voltage. The buffer provides a high-end driving signal to the high-end transistor according to a bias voltage. The boost capacitor is serial coupled between a base voltage and a bias voltage. A first end of the depletion transistor is coupled to a second power voltage, a second end of the depletion transistor is coupled to the bias voltage, and a control end of the depletion transistor receives the reference ground voltage.

Abstract: A high voltage bootstrap gate driving apparatus is provided. The gate driving apparatus includes a high-end transistor, a low-end transistor, a buffer, a boost capacitor, and a high voltage depletion transistor. The high-end transistor receives a first power voltage. The buffer provides a high-end driving signal to the high-end transistor according to a bias voltage. The boost capacitor is serial coupled between a base voltage and a bias voltage. A first end of the depletion transistor is coupled to a second power voltage, a second end of the depletion transistor is coupled to the bias voltage, and a control end of the depletion transistor receives the reference ground voltage.