Patents by Inventor Ming-Chieh Lee

Ming-Chieh Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220384403
    Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.
    Type: Application
    Filed: August 5, 2022
    Publication date: December 1, 2022
    Inventors: Tung-Kai LIU, Tsau-Hua HSIEH, Wei-Cheng CHU, Chun-Hsien LIN, Chandra LIUS, Ting-Kai HUNG, Kuan-Feng LEE, Ming-Chang LIN, Tzu-Min YAN, Hui-Chieh WANG
  • Publication number: 20220367177
    Abstract: A single layer process is utilized to reduce swing effect interference and reflection during imaging of a photoresist. An anti-reflective additive is added to a photoresist, wherein the anti-reflective additive has a dye portion and a reactive portion. Upon dispensing the reactive portion will react with underlying structures to form an anti-reflective coating between the underlying structure and a remainder of the photoresist. During imaging, the anti-reflective coating will either absorb the energy, preventing it from being reflected, or else modify the optical path of reflection, thereby helping to reduce interference caused by the reflected energy.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 17, 2022
    Inventors: Hung-Jui Kuo, Hsing-Chieh Lee, Ming-Tan Lee
  • Publication number: 20220285346
    Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary semiconductor structure includes a number of channel members over a substrate, a gate structure wrapping around each of the number of channel members, a dielectric fin structure disposed adjacent to the gate structure, the dielectric fin structure includes a first dielectric layer disposed over the substrate and in direct contact with the first gate structure, a second dielectric layer disposed over the first dielectric layer, and a third dielectric layer. The third dielectric is disposed over the second dielectric layer and spaced apart from the first dielectric layer and the gate structure by the second dielectric layer. The dielectric fin structure also includes an isolation feature disposed directly over the third dielectric layer.
    Type: Application
    Filed: September 2, 2021
    Publication date: September 8, 2022
    Inventors: Ming-Shuan Li, Tsung-Lin Lee, Chih Chieh Yeh
  • Patent number: 11437288
    Abstract: A display device includes a substrate, a light-emitting element, and a transistor. The substrate has a top surface. The light-emitting element is disposed on the substrate, and includes a first electrode and a second electrode. The transistor is disposed on the substrate and electrically connected to the light-emitting element. The transistor includes a gate electrode and a semiconductor layer. The semiconductor layer includes an overlapping portion overlapped with the gate electrode. The first electrode and the second electrode of the light-emitting element do not overlap with the overlapping portion along a direction perpendicular to the top surface of the substrate.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: September 6, 2022
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
  • Publication number: 20220270943
    Abstract: A semiconductor memory device and method of making the same are disclosed. The semiconductor memory device includes a substrate that includes a memory region and a peripheral region, a transistor including a metal gate located in the peripheral region, a composite dielectric film structure located over the metal gate of the transistor, the composite dielectric film structure including a first dielectric layer and a second dielectric layer over the first dielectric layer, where the second dielectric layer has a greater density than a density of the first dielectric layer, and at least one memory cell located in the memory region. The composite dielectric film structure provides enhanced protection of the metal gate against etching damage and thereby improves device performance.
    Type: Application
    Filed: September 14, 2021
    Publication date: August 25, 2022
    Inventors: Sheng-Chieh CHEN, Chih-Ren HSIEH, Ming-Lun LEE, Wei-Ming WANG, Ming Chyi LIU
  • Patent number: 11387683
    Abstract: An integrated circuit (IC) includes a first circuit layer that includes a first wireless power transfer (WPT) device, a first chip electrically connected to the first circuit layer, and a first tracking circuit disposed in the first chip. The first WPT device may be configured to extract energy from an electromagnetic signal and provide an output voltage. The first tracking circuit may be powered by the output voltage of the first WPT device and may output tracking data in response to an instruction extracted from the electromagnetic signal.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: July 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Min-Jer Wang, Ching-Nen Peng, Chewn-Pu Jou, Feng Wei Kuo, Hao Chen, Hung-Chih Lin, Huan-Neng Chen, Kuang-Kai Yen, Ming-Chieh Liu, Tsung-Hsiung Lee
  • Publication number: 20220190618
    Abstract: An electronic device selectively coupled to a first charger and/or a second charger includes a power supply interface, a first comparator, a second comparator, a controller, a first switch circuit, and a second switch circuit. The power supply interface receives a first input voltage and a second input voltage. The first comparator compares the first input voltage with a first reference voltage, so as to generate a first comparison voltage. The second comparator compares the second input voltage with a second reference voltage, so as to generate a second comparison voltage. The controller generates a first control voltage and a second control voltage according to the first comparison voltage and the second comparison voltage. The first switch circuit is selectively enabled or disabled according to the first control voltage. The second switch circuit is selectively enabled or disabled according to the second control voltage.
    Type: Application
    Filed: February 1, 2021
    Publication date: June 16, 2022
    Inventors: Hsin-Chih KUO, Ming-Chieh LEE
  • Publication number: 20220070470
    Abstract: Techniques are described for efficiently encoding video data by skipping evaluation of certain encoding modes based on various evaluation criteria. In some solutions, intra-block evaluation is performed in a specific order during encoding, and depending on encoding cost calculations of potential intra-block encoding modes, evaluation of some of the potential modes can be skipped. In some solutions, some encoding modes can be skipped depending on whether blocks are simple (e.g., simple vertical, simple horizontal, or both) or non-simple. In some solutions, various criteria are applied to determine whether chroma-from-luma mode evaluation can be skipped. The various solutions can be used independently and/or in combination.
    Type: Application
    Filed: November 9, 2021
    Publication date: March 3, 2022
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. Holcomb, Jiahao Li, Bin Li, Yan Lu, Mei-Hsuan Lu, Andrey Mikhaylovic Mezentsev, Ming-Chieh Lee
  • Patent number: 11265357
    Abstract: Techniques are described for encapsulating AV1 encoded video data within NAL units. For example, the NAL units can be H.264 or HEVC NAL units. Encapsulation can comprise using a reserved NAL unit type. For example, an open bitstream unit comprising AV1 encoded video data can be encapsulated within a NAL unit using a reserved NAL unit type. The NAL unit can be packetized for delivery to another computing device via a computer network.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: March 1, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mei-Hsuan Lu, Satya Sasikanth Bendapudi, Chun-Wei Chan, Ming-Chieh Lee
  • Publication number: 20210392346
    Abstract: Innovations in hash table construction and hash-based block matching for image encoding or video encoding are described. For example, an encoder determines hash values for base-size candidate blocks in a reference picture. The encoder stores, in a hash table, the hash values for the base-size candidate blocks. The encoder encodes a trial-size current block in a current picture. In some cases, the trial-size current block has a block size larger than the base block size. As part of the encoding, the encoder uses hash-based block matching, between base-size current blocks of the trial-size current block and the base-size candidate blocks, to identify a trial-size matching block, if any, in the reference picture. The encoder stores hash values only for the base-size candidate blocks. This can significantly reduce the computational cost and memory cost for hash table construction during encoding, without hurting compression efficiency or the overall speed of encoding.
    Type: Application
    Filed: June 12, 2020
    Publication date: December 16, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. HOLCOMB, Bin LI, Yan LU, Mei-Hsuan LU, Ming-Chieh LEE
  • Patent number: 11202085
    Abstract: Innovations in hash table construction and hash-based block matching for image encoding or video encoding are described. For example, an encoder determines hash values for base-size candidate blocks in a reference picture. The encoder stores, in a hash table, the hash values for the base-size candidate blocks. The encoder encodes a trial-size current block in a current picture. In some cases, the trial-size current block has a block size larger than the base block size. As part of the encoding, the encoder uses hash-based block matching, between base-size current blocks of the trial-size current block and the base-size candidate blocks, to identify a trial-size matching block, if any, in the reference picture. The encoder stores hash values only for the base-size candidate blocks. This can significantly reduce the computational cost and memory cost for hash table construction during encoding, without hurting compression efficiency or the overall speed of encoding.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: December 14, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. Holcomb, Bin Li, Yan Lu, Mei-Hsuan Lu, Ming-Chieh Lee
  • Publication number: 20210377544
    Abstract: Techniques are described for efficiently encoding video data by skipping evaluation of certain encoding modes based on various evaluation criteria. In some solutions, intra-block evaluation is performed in a specific order during encoding, and depending on encoding cost calculations of potential intra-block encoding modes, evaluation of some of the potential modes can be skipped. In some solutions, some encoding modes can be skipped depending on whether blocks are simple (e.g., simple vertical, simple horizontal, or both) or non-simple. In some solutions, various criteria are applied to determine whether chroma-from-luma mode evaluation can be skipped. The various solutions can be used independently and/or in combination.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. Holcomb, Jiahao Li, Bin Li, Yan Lu, Mei-Hsuan Lu, Andrey Mikhaylovic Mezentsev, Ming-Chieh Lee
  • Patent number: 11190774
    Abstract: Techniques are described for efficiently encoding video data by skipping evaluation of certain encoding modes based on various evaluation criteria. In some solutions, intra-block evaluation is performed in a specific order during encoding, and depending on encoding cost calculations of potential intra-block encoding modes, evaluation of some of the potential modes can be skipped. In some solutions, some encoding modes can be skipped depending on whether blocks are simple (e.g., simple vertical, simple horizontal, or both) or non-simple. In some solutions, various criteria are applied to determine whether chroma-from-luma mode evaluation can be skipped. The various solutions can be used independently and/or in combination.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: November 30, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Thomas W. Holcomb, Jiahao Li, Bin Li, Yan Lu, Mei-Hsuan Lu, Andrey Mikhaylovic Mezentsev, Ming-Chieh Lee
  • Patent number: 11089343
    Abstract: Innovations described herein provide a framework for advertising encoder capabilities, initializing encoder configuration, and signaling run-time control messages for video coding and decoding. For example, an encoding controller receives a request for encoder capability data from a decoding host controller, determines the capability data, and sends the capability data in reply. The capability data can include data that indicate a number of bitstreams, each providing an alternative version of input video, as well as data that indicate scalable video coding capabilities. The decoding host controller creates stream configuration request data based on the encoder capability data, and sends the configuration request data to the encoding controller. During decoding, the decoding host controller can create and send a control message for run-time control of encoding, where the control message includes a stream identifier for a bitstream and layer identifiers for a given layer of the bitstream.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: August 10, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Mei-Hsuan Lu, Ming-Chieh Lee
  • Patent number: 11057628
    Abstract: Various embodiments of the present technology generally relate to encoding techniques. More specifically, some embodiments relate to encoding techniques for screen data. Intra block copy (IntraBC) using motion compensation within a frame (not between frames) is very useful for encoding data captured from screen. Unfortunately, this tool is not included in most of video coding standards, including the base version of HEVC (i.e., H.265). Various embodiments of the present technology utilize encoding techniques to simulate IntraBC with compliant syntax. For example, embodiments divide a high-resolution frame into smaller areas and then encode these areas independently as if these smaller areas were independent frames.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: July 6, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: You Zhou, Chih-Lung Lin, Ming Chieh Lee
  • Publication number: 20210203957
    Abstract: When encoding/decoding a current block of a current picture using intra block copy (“BC”) prediction, the location of a reference block is constrained so that it can be entirely within an inner search area of the current picture or entirely within an outer search area of the current picture, but cannot overlap both the inner search area and the outer search area. In some hardware-based implementations, on-chip memory buffers sample values of the inner search area, and off-chip memory buffers sample values of the outer search area. By enforcing this constraint on the location of the reference block, an encoder/decoder can avoid memory access operations that are split between on-chip memory and off-chip memory when retrieving the sample values of the reference block. At the same time, a reference block close to the current block may be used for intra BC prediction, helping compression efficiency.
    Type: Application
    Filed: March 11, 2021
    Publication date: July 1, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: You Zhou, Chih-Lung Lin, Ming-Chieh Lee
  • Patent number: 11026309
    Abstract: An LED (Light Emitting Diode) drive circuit includes a magnetic device, a power transistor, a current-sense resistor, and a controller. The magnetic device has a first terminal for receiving an input voltage derived from an input of the LED drive circuit, and a second terminal. The magnetic device generates an output current to drive at least one LED. The power transistor has a drain coupled to the second terminal of the magnetic device, a control terminal, and a source. The current-sense resistor has a first terminal coupled to the source of the power transistor for forming a current input signal, and a second terminal coupled to ground. The controller generates a switching signal coupled to control the power transistor to switch current through the magnetic device based on both a programmable signal derived from the input of the LED drive circuit, and the current input signal.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: June 1, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Ta-Yung Yang, Chuh-Ching Li, Ming-Chieh Lee, Kuo-Hsien Huang
  • Publication number: 20210133577
    Abstract: Apparatus and methods are disclosed for using machine learning models with private and public domains. Operations can be applied to transform input to a machine learning model in a private domain that is kept secret or otherwise made unavailable to third parties. In one example of the disclosed technology, a method includes applying a private transform to produce transformed input, providing the transformed input to a machine learning model that was trained using a training set modified by the private transform, and generating inferences with the machine learning model using the transformed input. Examples of suitable transforms that can be employed include matrix multiplication, time or spatial domain to frequency domains, and partitioning a neural network model such that an input and at least one hidden layer form part of the private domain, while the remaining layers form part of the public domain.
    Type: Application
    Filed: March 24, 2020
    Publication date: May 6, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Sriram Srinivasan, David Yuheng Zhao, Ming-Chieh Lee, Mu Han
  • Patent number: 10986349
    Abstract: When encoding/decoding a current block of a current picture using intra block copy (“BC”) prediction, the location of a reference block is constrained so that it can be entirely within an inner search area of the current picture or entirely within an outer search area of the current picture, but cannot overlap both the inner search area and the outer search area. In some hardware-based implementations, on-chip memory buffers sample values of the inner search area, and off-chip memory buffers sample values of the outer search area. By enforcing this constraint on the location of the reference block, an encoder/decoder can avoid memory access operations that are split between on-chip memory and off-chip memory when retrieving the sample values of the reference block. At the same time, a reference block close to the current block may be used for intra BC prediction, helping compression efficiency.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: April 20, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: You Zhou, Chih-Lung Lin, Ming-Chieh Lee
  • Publication number: 20210112109
    Abstract: Techniques are described for encapsulating AV1 encoded video data within NAL units. For example, the NAL units can be H.264 or HEVC NAL units. Encapsulation can comprise using a reserved NAL unit type. For example, an open bitstream unit comprising AV1 encoded video data can be encapsulated within a NAL unit using a reserved NAL unit type. The NAL unit can be packetized for delivery to another computing device via a computer network.
    Type: Application
    Filed: November 1, 2019
    Publication date: April 15, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Mei-Hsuan Lu, Satya Sasikanth Bendapudi, Chun-Wei Chan, Ming-Chieh Lee