Abstract: An electronic device including a substrate, a light-shielding layer, a first insulating layer, a semiconductor layer, a second insulating layer and a drain is disclosed. The light-shielding layer is disposed on the substrate. The first insulating layer is disposed on the light-shielding layer. The semiconductor layer is disposed on the first insulating layer. The second insulating layer is disposed on the semiconductor layer and has a hole, and the hole exposes a portion of the first insulating layer. The drain is connected to the semiconductor layer through the hole. A first minimum distance exists between the above portion of the first insulating layer and the light-shielding layer, a second minimum distance exists between the semiconductor layer and the light-shielding layer, and a ratio of the first minimum distance to the second minimum distance is greater than or equal to 0.1 and less than or equal to 1.0.

Abstract: A radio frequency (RF) tamper detector of an electronic device can offer improved chassis intrusion monitoring to protect the device from software and hardware-based tampering. The tamper detector can monitor RF noise levels in a first frequency band and in a second frequency band to calculate an RF noise level moving average for each frequency band. If the moving averages in both frequency bands exceed a RF noise threshold, the tamper detector can set a cover removal flag to indicate that a cover of the device housing has been removed. The tamper detector can cause the electronic device to lock or disable a system BIOS when cover removal is detected. Additionally, the electronic device can notify remote monitoring systems (e.g., operated by an IT administrator or warranty support center) to receive additional instructions to secure the device.

Abstract: In a package device, wherein integrated circuit devices are bonded to a substrate, stress arising from mechanical strain, CTE mismatch, and the like can be alleviated or eliminated by incorporating stress buffering air gaps into a protective material, such as a gap fill oxide. The air gaps can be formed by tuning and changing deposition parameters during the deposition process and/or by tuning the size and placement of adjacent integrated circuit devices in the package, and/or by forming trenches in the protective material prior to the bonding process.

Abstract: A semiconductor die package and a method of forming the same are provided. The semiconductor die package includes a package substrate, semiconductor dies over the package substrate, and an underfill element over the package substrate and surrounding the semiconductor dies. A portion of the underfill element is located between the semiconductor dies. The semiconductor die package also includes lid structures respectively attached to the top surfaces of the semiconductor dies. In plan view, each lid structure is located within the periphery of the top surface of the corresponding semiconductor die. Each lid structure is disconnected from other lid structures, and a gap is formed between adjacent lid structures and located over the portion of the underfill element.

Abstract: A package structure is provided. The package structure includes a redistribution structure on a substrate, a semiconductor die on the redistribution structure and electrically connected to the substrate, a wall structure on the redistribution structure and electrically isolated from the substrate. The semiconductor die includes a first sidewall, a second sidewall connected to the first sidewall, and a third sidewall connected to the second sidewall. The wall structure includes a first partition, a second partition and a third partition respectively immediately adjacent to the first sidewall, the second sidewall, and the third sidewall of the semiconductor die. The first partition is located immediately adjacent to and spaced apart from the second partition by a first distance, the second partition is located immediately adjacent to and spaced apart from the third partition by a second distance, and the first distance is substantially equal to the second distance.

Abstract: A package structure is provided. The package structure includes a semiconductor die over a redistribution structure, bonding elements below the redistribution structure, and an underfill layer surrounding the bonding elements and the redistribution structure. The semiconductor die has a rectangular profile in a plan view. A pitch of the bonding elements is defined as the sum of a diameter of the bonding elements and a spacing between neighboring two of the bonding elements. A first circular area of the redistribution structure is entirely covered and in direct contact with the underfill layer. The center of the first circular area is aligned with a first corner of the rectangular profile of the semiconductor die. A diameter of the first circular area is greater than twice the pitch of the bonding elements.

Abstract: A package includes a first die over and bonded to a first side of a second die, where the second die includes a first substrate, a first interconnect structure over the first substrate, a seal ring disposed within the first interconnect structure, first dummy through substrate vias (TSVs) extending through edge regions of the first substrate of the second die and in physical contact with the seal ring, and functional TSVs extending through a central region of the first substrate of the second die.

Abstract: A method includes bonding a device die onto a package component. The device die includes a semiconductor substrate, and a through-via extending into the semiconductor substrate. The method further includes depositing a dielectric liner lining sidewalls of the device die, depositing a dielectric layer on the dielectric liner, and planarizing the dielectric layer and the device die. Remaining portions of the dielectric liner and the dielectric layer form a gap-filling region, and a top end of the through-via is revealed. An implantation process is performed to introduce a stress modulation dopant into at least one of the dielectric liner and the dielectric layer. A redistribution line is formed over and electrically connecting to the through-via.

Abstract: A method includes depositing a dielectric layer on a package component having a first warpage, and performing an implantation process to implant the dielectric layer with a stress modulation dopant. After the implantation process, the package component has a second warpage smaller than the first warpage.

Abstract: A fan-out package includes a redistribution structure having redistribution-side bonding structures, a plurality of semiconductor dies including a respective set of die-side bonding structures that is attached to a respective subset of the redistribution-side bonding structures through a respective set of solder material portions, and an underfill material portion laterally surrounding the redistribution-side bonding structures and the die-side bonding structures of the plurality of semiconductor dies. A subset of the redistribution-side bonding structures is not bonded to any of the die-side bonding structures of the plurality of semiconductor dies and is laterally surrounded by the underfill material portion, and is used to provide uniform distribution of the underfill material during formation of the underfill material portion.

Abstract: Some implementations are directed to a wireless receiver. In some implementations, the wireless receiver may include a receiver body encompassing one or more antenna elements, a cover removably coupled to the receiver body, and a mounting bracket removably coupled to the receiver body. In some implementations, at least one of the one or more antenna elements, the cover, or the mounting bracket is movable with respect to the receiver body in order to align the wireless receiver with a signal path.

Abstract: A package includes a first package component; a second package component bonded to the first package component by a first plurality of solder connectors; and a first plurality of spacer connectors extending from the first package component to the second package component. A diameter of a spacer connector the first plurality of spacer connectors is larger than a height of a solder connector of the first plurality of solder connectors, and the first plurality of spacer connectors comprises a different material than the first plurality of solder connectors.

Abstract: A method and system for producing an adjustable resistor with a set resistance for adjusting quiescent current in a GaN transistor in a power amplifier. A quiescent current on the GaN power amplifier is measured via a test probe from a microcontroller unit on a test fixture. A resistance value is determined for output of a voltage bias value to adjust the quiescent current of the GaN transistor in the power amplifier. The resistance value is stored in an electronically adjustable resistor. The adjustable resistor is coupled to an output voltage circuit to provide voltage at the voltage vias value to a voltage bias input of the power amplifier.

Abstract: The present invention provides a method for generating a virtual navigation route, by obtaining multiple navigation points each with a flag data; identifying at least two lanes from a front video data; creating a navigation characteristic image according to the flag data, the navigation points, the front video data, and the at least two lanes, wherein the navigation characteristic image has multiple dotted grids; calculating a probability of a navigation route passing through each dotted grid, and setting the dotted grid with the highest probability calculated in each row of the navigation characteristic image as a first default value; and fitting curves for the grids with the first default value as the navigation route; the navigation route is generated in real time and projected over the front video data using an augmented reality (AR) method, achieving AR effects and navigating with better representation of the traffic.

Abstract: The present invention provides a method for generating a virtual navigation route, by obtaining multiple navigation points each with a flag data; identifying at least two lanes from a front video data; creating a navigation characteristic image according to the flag data, the navigation points, the front video data, and the at least two lanes, wherein the navigation characteristic image has multiple dotted grids; calculating a probability of a navigation route passing through each dotted grid, and setting the dotted grid with the highest probability calculated in each row of the navigation characteristic image as a first default value; and fitting curves for the grids with the first default value as the navigation route; the navigation route is generated in real time and projected over the front video data using an augmented reality (AR) method, achieving AR effects and navigating with better representation of the traffic.

Abstract: A system of concentrating and separating waste solvent liquid includes a distillation tower, an extracting distillation unit, an extract agent recovery unit, and a vapor permeation film unit. The scheme of centrifugal distillation is specifically employed to collocate with vapor permeation to effectively concentrate the content of isopropanol in the waste solvent liquid to generate a final produce with ultra high concentration of isopropanol, and constantly recovers the extract agent. The system is able to be quickly settled to a steady state of operation with low power consumption because the extracting distillation unit has smaller size. Since no liquid is left in the extract agent recovery unit, operation risk is greatly reduced. In addition, the input feed is almost processed, overall efficiency is thus improved. The vapor permeation film unit further removes considerably little content of water from the organic solvent to increase the content of isopropanol up to 99.9% or more.

Abstract: A system of concentrating and separating waste solvent liquid includes a distillation tower, an extracting distillation unit, an extract agent recovery unit, and a vapor permeation film unit. The scheme of centrifugal distillation is specifically employed to collocate with vapor permeation to effectively concentrate the content of isopropanol in the waste solvent liquid to generate a final produce with ultra high concentration of isopropanol, and constantly recovers the extract agent. The system is able to be quickly settled to a steady state of operation with low power consumption because the extracting distillation unit has smaller size. Since no liquid is left in the extract agent recovery unit, operation risk is greatly reduced. In addition, the input feed is almost processed, overall efficiency is thus improved. The vapor permeation film unit further removes considerably little content of water from the organic solvent to increase the content of isopropanol up to 99.9% or more.

Abstract: A foreign object detection device includes a processor, a detecting circuit assembly connected to the processor, a coil connected to the detecting circuit assembly, a signal generator connected to the processor and the detecting circuit assembly, and a coil configuring circuit connected to the processor and the coil. The processor outputs a control signal to the coil configuring circuit so as to control the coil configuring circuit to generate a switch signal for enabling the coil to switch to one of a closed mode and an open mode, and controls the signal generator to transmit a test signal to the coil via the detecting circuit assembly when the coil is in the open mode.

Abstract: A foreign object detection device includes a processor, a detecting circuit assembly connected to the processor, a coil connected to the detecting circuit assembly, a signal generator connected to the processor and the detecting circuit assembly, and a coil configuring circuit connected to the processor and the coil. The processor outputs a control signal to the coil configuring circuit so as to control the coil configuring circuit to generate a switch signal for enabling the coil to switch to one of a closed mode and an open mode, and controls the signal generator to transmit a test signal to the coil via the detecting circuit assembly when the coil is in the open mode.