Patents by Inventor Ming-Chih WU
Ming-Chih WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230090794Abstract: An electronic device for controlling an LRA (Linear Resonant Actuator) includes a signal generator, a driver, a delay unit, a sensor, and a DSP (Digital Signal Processor). The signal generator generates a digital signal. The driver drives the LRA according to the digital signal. The delay unit delays the digital signal for a predetermined time, so as to generate an estimated voltage signal. The sensor detects the current flowing through the LRA, so as to generate a sensing current signal. The DSP controls the resonant frequency or the gain value of the signal generator according to the estimated voltage signal and the sensing current signal.Type: ApplicationFiled: October 28, 2021Publication date: March 23, 2023Inventors: Tsung-Han YANG, Yen-Chih WANG, Ming-Jun HSIAO, Tsung-Nan WU
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Publication number: 20230056353Abstract: A micro scanning mirror, including a fixed substrate, a lens, and multiple cantilevers, are provided. Each cantilever includes a piezoelectric material structure, multiple first drive electrodes, and multiple second drive electrodes. The piezoelectric material structure includes a connecting part, a folding part, and a fixed part. The connecting part connects the lens along a direction parallel to a central axis of the lens. The folding part has a bending region and multiple drive electrode regions. The fixed part is connected to the fixed substrate, and the folding part is connected to the connecting part and the fixed part. The first drive electrodes and the second drive electrodes are respectively located in the corresponding drive electrode regions in the folding part. The micro scanning mirror of the disclosure can drive a large-sized micro mirror to rotate at an appropriate rotation angle.Type: ApplicationFiled: August 3, 2022Publication date: February 23, 2023Applicant: Coretronic MEMS CorporationInventors: Shih-Chi Liu, Wei-Leun Fang, Kai-Chih Liang, Kai-Chieh Chang, Ming-Ching Wu
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Publication number: 20230008519Abstract: An automatic vehicle positioning management system includes an on-vehicle apparatus and a portable device. The on-vehicle apparatus, installed on a vehicle, acquires a first location of the vehicle through wireless positioning. The first location is sent to the portable device which acquires a second location of the vehicle through GPS. When multiple vehicles form a fleet, each vehicle respectively sends its first and second locations to a server through its portable device. The second location of each vehicle is corrected by operations of point error analysis, image overlay and point error correction, so that the fleet can be managed more precisely.Type: ApplicationFiled: July 7, 2021Publication date: January 12, 2023Inventors: HSIU-LING HUANG, WEI-CHIH WU, MING-CHIEH LIN
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Patent number: 11527439Abstract: A method includes forming a plurality of dielectric layers over a semiconductor substrate, etching the plurality of dielectric layers and the semiconductor substrate to form an opening, depositing a first liner extending into the opening, and depositing a second liner over the first liner. The second liner extends into the opening. The method further includes filling a conductive material into the opening to form a through-via, and forming conductive features on opposing sides of the semiconductor substrate. The conductive features are electrically interconnected through the through-via.Type: GrantFiled: December 31, 2020Date of Patent: December 13, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ming-Tsu Chung, Ku-Feng Yang, Tsang-Jiuh Wu, Wen-Chih Chiou, Chen-Hua Yu
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Publication number: 20220359377Abstract: A method for forming a via in a semiconductor device and a semiconductor device including the via are disclosed. In an embodiment, the method may include bonding a first terminal and a second terminal of a first substrate to a third terminal and a fourth terminal of a second substrate; separating the first substrate to form a first component device and a second component device; forming a gap fill material over the first component device, the second component device, and the second substrate; forming a conductive via extending from a top surface of the gap fill material to a fifth terminal of the second substrate; and forming a top terminal over a top surface of the first component device, the top terminal connecting the first component device to the fifth terminal of the second substrate through the conductive via.Type: ApplicationFiled: July 21, 2022Publication date: November 10, 2022Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Wen-Chih Chiou, Tsang-Jiuh Wu, Der-Chyang Yeh, Ming Shih Yeh
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Publication number: 20220359292Abstract: A method includes forming a plurality of dielectric layers over a semiconductor substrate, etching the plurality of dielectric layers and the semiconductor substrate to form an opening, depositing a first liner extending into the opening, and depositing a second liner over the first liner. The second liner extends into the opening. The method further includes filling a conductive material into the opening to form a through-via, and forming conductive features on opposing sides of the semiconductor substrate. The conductive features are electrically interconnected through the through-via.Type: ApplicationFiled: July 25, 2022Publication date: November 10, 2022Inventors: Ming-Tsu Chung, Ku-Feng Yang, Tsang-Jiuh Wu, Wen-Chih Chiou, Chen-Hua Yu
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Publication number: 20220359284Abstract: Embodiments provide a high aspect ratio via for coupling a top electrode of a vertically oriented component to the substrate, where the top electrode of the component is coupled to the via by a conductive bridge, and where the bottom electrode of the component is coupled to substrate. Some embodiments provide for mounting the component by a component wafer and separating the components while mounted to the substrate. Some embodiments provide for mounting individual components to the substrate.Type: ApplicationFiled: July 21, 2022Publication date: November 10, 2022Inventors: Chen-Hua Yu, Chi-Hsi Wu, Wen-Chih Chiou, Tsang-Jiuh Wu, Der-Chyang Yeh, Ming Shih Yeh, An-Jhih Su
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Patent number: 11476699Abstract: A power backup circuit provides a plurality of input power sources to back up a load. The power backup circuit includes a first switch, a second switch, and a control unit. The input power sources at least includes a first input power source and a second input power source. If the input power source of the load needs to be changed from the first input power source to the second input power source, the control unit controls the first switch to be coupled to the second input power source and controls the second switch to be coupled to the second input power source after the control unit effects a supply current flowing through a first power supply path and a second power supply path both coupled to the first input power source and the load to be reduced below a current threshold.Type: GrantFiled: August 7, 2020Date of Patent: October 18, 2022Assignee: DELTA ELECTRONICS, INC.Inventors: Te-Chih Peng, Ming-Hsiang Lo, Chih-Hong Wu, Yu-Ren Weng
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Patent number: 11469138Abstract: Embodiments provide a high aspect ratio via for coupling a top electrode of a vertically oriented component to the substrate, where the top electrode of the component is coupled to the via by a conductive bridge, and where the bottom electrode of the component is coupled to substrate. Some embodiments provide for mounting the component by a component wafer and separating the components while mounted to the substrate. Some embodiments provide for mounting individual components to the substrate.Type: GrantFiled: December 7, 2018Date of Patent: October 11, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Hua Yu, Chi-Hsi Wu, Wen-Chih Chiou, Tsang-Jiuh Wu, Der-Chyang Yeh, Ming Shih Yeh, An-Jhih Su
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Patent number: 11459354Abstract: The present invention provides improved processes for purifying liraglutide. Liraglutide is purified via two sequential RP-HPLC purifications followed by a salt-exchange step, where a pH is kept constant in the first and second purification steps. In particular, the processes utilize a halogenated solvent in a sample preparation step, which provides better solubility and an environment suitable for decarboxylation for crude liraglutide prior to a RP-HPLC purification.Type: GrantFiled: March 25, 2020Date of Patent: October 4, 2022Assignee: ScinoPharm Taiwan, Ltd.Inventors: Ming-Chih Wu, Hsin-Che Huang, Tsung-Yu Hsiao
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Publication number: 20220302110Abstract: A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.Type: ApplicationFiled: June 10, 2022Publication date: September 22, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuan-Jung Chen, I-Chih Chen, Chih-Mu Huang, Kai-Di Wu, Ming-Feng Lee, Ting-Chun Kuan
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Patent number: 11444020Abstract: A method for forming a via in a semiconductor device and a semiconductor device including the via are disclosed. In an embodiment, the method may include bonding a first terminal and a second terminal of a first substrate to a third terminal and a fourth terminal of a second substrate; separating the first substrate to form a first component device and a second component device; forming a gap fill material over the first component device, the second component device, and the second substrate; forming a conductive via extending from a top surface of the gap fill material to a fifth terminal of the second substrate; and forming a top terminal over a top surface of the first component device, the top terminal connecting the first component device to the fifth terminal of the second substrate through the conductive via.Type: GrantFiled: April 13, 2020Date of Patent: September 13, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Wen-Chih Chiou, Tsang-Jiuh Wu, Der-Chyang Yeh, Ming Shih Yeh
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Patent number: 11404413Abstract: A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.Type: GrantFiled: October 3, 2018Date of Patent: August 2, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuan-Jung Chen, I-Chih Chen, Chih-Mu Huang, Kai-Di Wu, Ming-Feng Lee, Ting-Chun Kuan
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Publication number: 20210206800Abstract: The present invention provides improved processes for purifying semaglutide or liraglutide. Semaglutide or liraglutide is purified via two sequential RP-HPLC purifications followed by a salt-exchange step, where a pH is kept constant in the first and second purification steps. In particular, the processes utilize a halogenated solvent in a sample preparation step, which provides better solubility and an environment suitable for decarboxylation for crude semaglutide or liraglutide prior to a RP-HPLC purification.Type: ApplicationFiled: February 8, 2021Publication date: July 8, 2021Inventors: Ming-Chih WU, Tsung-Yu Hsiao
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Publication number: 20200308218Abstract: The present invention provides improved processes for purifying liraglutide. Liraglutide is purified via two sequential RP-HPLC purifications followed by a salt-exchange step, where a pH is kept constant in the first and second purification steps. In particular, the processes utilize a halogenated solvent in a sample preparation step, which provides better solubility and an environment suitable for decarboxylation for crude liraglutide prior to a RP-HPLC purification.Type: ApplicationFiled: March 25, 2020Publication date: October 1, 2020Inventors: Ming-Chih WU, Hsin-Che HUANG, Tsung-Yu HSIAO
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Patent number: 10435395Abstract: Crystalline form S1 of lifitegrast characterized by a powder X-ray diffraction pattern with peaks at about 10.7±0.2, 16.2±0.2, 19.9±0.2, 22.1±0.2, 24.7±0.2, and 25.9±0.2 degrees two-theta, crystalline form S2 of lifitegrast characterized by a powder X-ray diffraction pattern with peaks at about 16.4±0.2, 24.9±0.2, and 26.2±0.2 degrees two-theta, and processes of making thereof are provided.Type: GrantFiled: March 8, 2019Date of Patent: October 8, 2019Assignee: SCINOPHARM TAIWAN, LTD.Inventors: Wen-Wei Lin, Tsung-Cheng Hu, YuanChang Huang, Ming-Chih Wu
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Publication number: 20190300512Abstract: Crystalline form S1 of lifitegrast characterized by a powder X-ray diffraction pattern with peaks at about 10.7±0.2, 16.2±0.2, 19.9±0.2, 22.1±0.2, 24.7±0.2, and 25.9±0.2 degrees two-theta, crystalline form S2 of lifitegrast characterized by a powder X-ray diffraction pattern with peaks at about 16.4±0.2, 24.9±0.2, and 26.2±0.2 degrees two-theta, and processes of making thereof are provided.Type: ApplicationFiled: March 8, 2019Publication date: October 3, 2019Inventors: Wen-Wei Lin, Tsung-Cheng Hu, YuanChang Huang, Ming-Chih Wu
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Patent number: 10428052Abstract: The present disclosure provides efficient, economical, and improved processes for synthesizing lifitegrast and intermediates thereof. The currently discloses processes provide a direct synthetic route, avoiding protection or deprotection steps. The currently disclosed process also provides processes for synthesizing lifitegrast using a reduced number of synthetic steps.Type: GrantFiled: June 29, 2018Date of Patent: October 1, 2019Assignee: ScinoPharm Taiwan, Ltd.Inventors: Ming-Chih Wu, Tsung-Yu Hsiao
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Publication number: 20190002445Abstract: The present disclosure provides efficient, economical, and improved processes for synthesizing lifitegrast and intermediates thereof. The currently discloses processes provide a direct synthetic route, avoiding protection or deprotection steps. The currently disclosed process also provides processes for synthesizing lifitegrast using a reduced number of synthetic steps.Type: ApplicationFiled: June 29, 2018Publication date: January 3, 2019Inventors: Ming-Chih WU, Tsung-Yu HSIAO
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Patent number: 9609378Abstract: An IP camera, a communication method and a communication system are provided. The IP camera includes an image capturing unit, a video processing unit and a connection processing unit. The image capturing unit captures a plurality of consecutive images. The video processing unit is coupled to the image capturing unit, and generates a first video stream and a second video stream according to the images. The connection processing unit is coupled to the video processing unit, processes the first video stream into a first packet stream, and processes the second video stream into a second packet stream. The connection processing unit transmits the first packet stream to a local area wireless network unit through a first wireless link, and the connection processing unit transmits the second packet stream to an external electronic device through a second wireless link.Type: GrantFiled: December 9, 2014Date of Patent: March 28, 2017Assignee: SONIX Technology Co., Ltd.Inventors: Chung-Chih Ko, Ming-Chih Wu, Kun-Ming Huang