Patents by Inventor Ming Chiu

Ming Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955515
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
  • Patent number: 11942543
    Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
  • Publication number: 20240096961
    Abstract: A contact stack of a semiconductor device includes a source/drain feature, a silicide layer wrapping around the source/drain feature, a seed metal layer in direct contact with the silicide layer, and a conductor in contact with the seed metal layer. The contact stack excludes a metal nitride layer in direct contact with the silicide layer.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Shih-Chuan CHIU, Tien-Lu LIN, Yu-Ming LIN, Chia-Hao CHANG, Chih-Hao WANG, Jia-Chuan YOU
  • Patent number: 11934065
    Abstract: A display device includes a substrate, a first light emitting element, a second light emitting element, and an optical film sheet. The first light emitting element and the second light emitting element are disposed on the substrate. The first light emitting element emits a first light, and the first light has a first wavelength range. The second light emitting element emits a second light, and the second light has a second wavelength range. The optical film sheet is disposed above the first light emitting element and the second light emitting element. The optical film sheet includes a first zone and a second zone. The first zone includes a first cholesteric liquid crystal, and the first cholesteric liquid crystal reflects light in at least the first wavelength range. The second zone includes a second cholesteric liquid crystal, and the second cholesteric liquid crystal reflects light in at least the second wavelength range.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: March 19, 2024
    Assignee: AUO Corporation
    Inventors: Wan Heng Chang, Min-Hsuan Chiu, Syuan-Ying Lin, Wei-Ming Cheng
  • Patent number: 11921001
    Abstract: A method and system for inspecting deviation in dynamic characteristics of a feeding system are provided, and the method includes: exciting the feeding system and detecting vibrations of a subcomponent of a component to be inspected of the feeding system to generate a monitoring excitation signal in a monitoring mode; calculating, by a modal analysis method, monitoring eigenvalues and monitoring eigenvectors of the monitoring excitation signal; determining, by a modal verification method, similarity between the monitoring eigenvalues and standard eigenvalues of a digital twin model and similarity between the monitoring eigenvectors and standard eigenvectors of the digital twin model; determining that the dynamic characteristics of the subcomponent are deviated, when the monitoring eigenvalues and monitoring eigenvectors are not similar to the standard eigenvalues and standard eigenvectors. Therefore, the subcomponent whose dynamic characteristics are deviated can be sensed remotely and precisely.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: March 5, 2024
    Assignee: Hiwin Technologies Corp.
    Inventors: Hsien-Yu Chen, Yu-Sheng Chiu, Chih-Chun Cheng, Wen-Nan Cheng, Chi-Ming Liu
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 11916155
    Abstract: An optoelectronic package and a method for producing the optoelectronic package are provided. The optoelectronic package includes a carrier, a photonic device, a first encapsulant and a second encapsulant. The photonic device is disposed on the carrier. The first encapsulant covers the carrier and is disposed around the photonic device. The second encapsulant covers the first encapsulant and the photonic device. The first encapsulant has a topmost position and a bottommost position, and the topmost position is not higher than a surface of the photonic device.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: February 27, 2024
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chien-Hsiu Huang, Bo-Jhih Chen, Kuo-Ming Chiu, Meng-Sung Chou, Wei-Te Cheng, Kai-Chieh Liang, Yun-Ta Chen, Yu-Han Wang
  • Patent number: 11916009
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, a molding compound and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The at least one semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The molding compound is disposed over the interposer and laterally encapsulates the at least one semiconductor die. The molding compound laterally wraps around the interposer and the molding compound at least physically contacts a portion of the sidewalls of the interposer. The connectors are disposed on the second surface of the interposer, and are electrically connected with the at least one semiconductor die through the interposer.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Ming Huang, Ping-Kang Huang, Sao-Ling Chiu, Shang-Yun Hou
  • Patent number: 11917837
    Abstract: A method of forming the semiconductor device is provided. The method includes following steps. A memory structure is formed over a first conductive line over a substrate and is electrically connected to the first conductive line. A sacrificial layer is formed on the memory structure. A spacer layer is formed to cover the memory structure and the sacrificial layer. A first dielectric layer is formed to cover the spacer layer. A planarization process is performed to remove a portion of the first dielectric layer. A second dielectric layer is formed on the spacer layer and the first dielectric layer. A patterning process is performed to form an opening exposing a portion of the top surface of the sacrificial layer. The sacrificial layer is removed to form a recess. A second conductive line is formed in the opening and the recess to be electrically coupled to the memory structure.
    Type: Grant
    Filed: August 29, 2022
    Date of Patent: February 27, 2024
    Assignee: Winbond Electronics Corp.
    Inventors: Yung-Han Chiu, Shu-Ming Li, Po-Yen Hsu
  • Publication number: 20240035655
    Abstract: An incineration system is adapted for burning an incineration matter, and for generating a regenerative matter by hydrolyzing a hydrolysis matter. The incineration system includes an incineration device, a boiler device, a power generating device, and a thermal hydrolysis device. The incineration device includes an incinerator that is adapted for receiving the incineration matter and for burning the incineration matter to thereby generate heated air. The boiler device receives the heated air from the incinerator and generates steam via the heated air. The power generating device receives the steam from the boiler device to generate electric power. The thermal hydrolysis device includes a tank that is adapted for receiving the hydrolysis matter and the steam. The thermal hydrolysis device is adapted for hydrolyzing the hydrolysis matter via the steam, for generating the regenerative matter by hydrolyzing the hydrolysis matter, and for outputting the regenerative matter.
    Type: Application
    Filed: June 7, 2023
    Publication date: February 1, 2024
    Inventor: Ming-Chiu Lee
  • Publication number: 20230412463
    Abstract: A method for resuming topology of a single loop network and a network switch system are provided. The network switch system includes one or more first network switches each having a first port and a second port and a second network switch having a third port and a fourth port. When the first port of one of the first network switches is abnormal, a recovery control frame is transmitted through the second port. The second network switch sets the third port in a disabled state to an enabled state. When the abnormal port is resumed, the first network switch transmits a block control frame through the second port. The second network switch sets the third port in the enabled state to the disabled state and transmits a forward control frame through the fourth port. The first network switch sets the first port in the disabled state to the enabled state.
    Type: Application
    Filed: January 3, 2023
    Publication date: December 21, 2023
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chih-Ming Chiu, Kai-Wen Cheng, Yu-Yi Lin
  • Publication number: 20230403046
    Abstract: A millimeter wave communication apparatus includes: an electronic device, including a first waveguide connection port disposed on a casing of the electronic device, and a millimeter wave communication module connected to the first waveguide connection port to transmit and receive millimeter-wave signals; and an expansion device, installed on a carrier, and including a second waveguide connection port disposed on a casing of the expansion device and corresponding to a position of the first waveguide connection port of the electronic device, and at least one millimeter-wave antenna connected to the second waveguide connection port to transmit and receive the millimeter-wave signals. When the electronic device is fastened on the expansion device, the first waveguide connection port and the second waveguide connection port form a waveguide to transmit and receive the millimeter-wave signals. Therefore, attenuation of the millimeter-wave signals is avoided.
    Type: Application
    Filed: November 3, 2022
    Publication date: December 14, 2023
    Inventor: SHANG-MING CHIU
  • Publication number: 20230369919
    Abstract: A coil module for an inductive power supply system includes a first coil, a processor and a control element. The processor, coupled to the first coil, is configured to detect a plurality of resonant frequencies of the first coil corresponding to a plurality of coordinate points, respectively. The control element, coupled to the processor, is configured to control the position of the first coil according to the plurality of resonant frequencies.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Applicant: Fu Da Tong Technology Co., Ltd.
    Inventors: Ming-Chiu Tsai, Chi-Che Chan
  • Publication number: 20230348673
    Abstract: The present disclosure provides a toughened resin composition, which includes: (A) a toughened and modified compound, which includes a styrene maleic anhydride compound, an anhydride grafted olefin polymer, and a diisocyanate compound; (B) a thermosetting polymer; and (C) a toughening resin; wherein, in the toughened and modified compound, the diisocyanate compound forms a polyimide bond with the styrene maleic anhydride compound and the anhydride grafted olefin polymer, respectively. The present disclosure has high toughness and excellent mechanical properties; thus, it may have a wide range of applications in the fields of electronics, aerospace and the like.
    Type: Application
    Filed: October 12, 2022
    Publication date: November 2, 2023
    Inventors: Sheng-Yen WU, Po-Hsun LEE, Chun-Ming CHIU, Wen-Pin SU, Jui-Teng HSU, Chen-Yu HUANG, Chun-Han LIN
  • Publication number: 20230307826
    Abstract: A noise reduction structure includes an antenna, a noise source, an electromagnetic conductor, and a grounding member. The antenna has a transmission and reception bandwidth. The noise source radiates an electromagnetic wave. Frequency of the electromagnetic wave falls within the transmission and reception bandwidth. The electromagnetic conductor is closer to the antenna than the noise source. The grounding member is disposed at the noise source in such a manner to face the antenna. The grounding member is electrically isolated from the electromagnetic conductor and forms a good grounding path to the noise source. Furthermore, a transmission dock with the noise reduction structure is provided.
    Type: Application
    Filed: June 5, 2023
    Publication date: September 28, 2023
    Inventor: Shang-Ming CHIU
  • Patent number: 11733328
    Abstract: A signal analysis circuit for determining whether a supplying-end module of an induction type power supply system receives a modulation signal from a receiving-end module includes a signal receiving circuit, a gain amplifier, a ramp generator, a comparator, a timer and a processor. The signal receiving circuit is configured to obtain a coil signal on a supplying-end coil of the supplying-end module. The gain amplifier is configured to adjust a voltage level of the coil signal to generate an amplification signal. The ramp generator is configured to generate and output a ramp signal. The comparator is configured to compare the amplification signal with the ramp signal to determine a trigger time on which the amplification signal and the ramp signal intersect. The timer is configured to obtain a time data corresponding to the trigger time. The processor is configured to analyze the modulation signal according to the time data.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: August 22, 2023
    Assignee: Fu Da Tong Technology Co., Ltd.
    Inventors: Ming-Chiu Tsai, Chi-Che Chan
  • Publication number: 20230257627
    Abstract: A method for forming a retardation optical film is provided. The method includes: adding a diamine monomer (A) and a dianhydride monomer (A) in a solvent (A) to react to form a polyimide slurry; adding the polyimide slurry into a solvent (B) to precipitate out a plurality of polyimide fibers; washing the plurality of polyimide fibers with a solvent (C); mixing the plurality of polyimide fibers with a solvent (D) to obtain a soluble polyimide solution; reacting a diamine monomer (B) and a dianhydride monomer (B) to form a polyamic acid solution; coating a mixed solution including the soluble polyimide solution and the polyamic acid solution on a substrate; and heating to form a retardation optical film made of polyimide on the substrate.
    Type: Application
    Filed: May 18, 2022
    Publication date: August 17, 2023
    Inventors: CHI-YUNG TSENG, JIAN-MING CHIU, SHIU-HUI WANG
  • Publication number: 20230261156
    Abstract: A semiconductor assembly includes a substrate, a retaining wall, a light emitting unit, and a reflective layer. The substrate has a mounting surface. The retaining wall is disposed on the mounting surface and has an inner surface. An accommodation space is defined by the inner surface and the mounting surface. The light emitting unit is disposed in the accommodation space and disposed on the mounting surface. The light emitting unit has an upper light emitting surface and a side light emitting surface. The reflective resin layer is disposed in the accommodation space and disposed between the inner surface and the side light emitting surface. The reflective resin layer contains a based resin, a UV absorber, and reflective particles.
    Type: Application
    Filed: February 13, 2023
    Publication date: August 17, 2023
    Inventors: MIAO-SAN CHIEN, Kai-Chieh Liang, Wei-Te Cheng, KUO-MING CHIU
  • Patent number: D1021804
    Type: Grant
    Filed: October 9, 2021
    Date of Patent: April 9, 2024
    Assignees: JESS-LINK PRODUCTS CO., LTD., TARNG YU ENTERPRISE CO., LTD.
    Inventors: Min-Chun Chiu, Chieh-Ming Cheng, Mu-Jung Huang