Patents by Inventor Ming Chou

Ming Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128033
    Abstract: A tilt ball switch includes a cover, a first positioning unit, a plurality of conductive members, a conductive ball, a base wall, a surrounding wall that extends from a periphery of the base wall, and an opening that is formed at one end of the surrounding wall opposite to the base wall. The cover closes the opening, and cooperates with the base wall and the surrounding wall to define a receiving space. The first positioning unit is disposed in the receiving space, and is positioned between the base wall and the cover. The conductive ball is convertible between a conducting state, in which the conductive ball is in contact with at least two of the conductive members, and a non-conducting state, in which the conductive ball is spaced apart from the conductive members.
    Type: Application
    Filed: September 20, 2023
    Publication date: April 18, 2024
    Inventor: Tien-Ming CHOU
  • Publication number: 20240128324
    Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.
    Type: Application
    Filed: November 21, 2022
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Chih Lai, Shih-Min Chou, Nien-Ting Ho, Wei-Ming Hsiao, Li-Han Chen, Szu-Yao Yu, Chung-Yi Chiu
  • Patent number: 11963117
    Abstract: A method performed by a wireless communication device includes determining whether to transmit a first Sidelink Synchronization Signal (SLSS) according to a priority parameter when an occasion of the first SLSS collides with a Physical Sidelink Feedback Channel (PSFCH) that carries Sidelink Feedback Control Information (SFCI). The priority parameter is associated with a Physical Sidelink Shared Channel (PSSCH) that corresponds to the PSFCH.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: April 16, 2024
    Assignee: Hannibal IP LLC
    Inventors: Yu-Hsin Cheng, Tsung-Hua Tsai, Chie-Ming Chou, Yung-lan Tseng
  • Publication number: 20240121718
    Abstract: Some of the present implementations provide a method for a user equipment (UE) for receiving a power saving signal. The method receives, from a base station, a power saving signal comprising a minimum applicable K0 (K0min) that indicates a minimum scheduling offset restriction between a physical downlink control channel (PDCCH) and a physical downlink shared channel (PDSCH). The method determines an application delay based on a predefined value. The method then applies the minimum scheduling offset restriction after the application delay.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Hsin Cheng, Chie-Ming Chou, Wan-Chen Lin, Tsung-Hua Tsai
  • Patent number: 11955397
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: April 9, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
  • Publication number: 20240100553
    Abstract: A sprayer, comprising: a container, configured to contain liquid; a passage, comprising a first opening, a second opening, a resonator and a mesh, when the liquid is passed through the resonator, the liquid is emitted as a gas; a first optical sensor, configured to sense first optical data of at least portion of the mesh or at least portion of a surface of the container; and a processing circuit, configured to compute a foaming level of the mesh or of the surface according to the first optical data, and configured to determine whether the resonator should be turned off or not according to the foaming level. In another aspect, the processing circuit estimates a liquid level of the liquid but does not correspondingly turn off the resonator. By this way, the resonator may be turned on or turned off more properly and the liquid level may be more precisely estimated.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Applicant: PixArt Imaging Inc.
    Inventors: Shih-Jen Lu, Yang-Ming Chou, Chih-Hao Wang, Chien-Yi Kao, Hsin-Yi Lin
  • Publication number: 20240105619
    Abstract: Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 28, 2024
    Inventors: Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen, Chin-Chou Liu, Yi-Kan Cheng
  • Publication number: 20240107495
    Abstract: During operation, a computer system may provide instructions to access points in an indoor environment to measure relative distances between the access points. Then, the computer system may receive the measured relative distances. Moreover, the computer system may calculate geographic locations of the access points based at least in part on the measured relative distances. Next, the computer system may select potential anchor access points in the access points, and may provide, to an electronic device, information specifying the potential anchor access points. Furthermore, the computer system may receive, from the electronic device, second information specifying anchor access points in the potential access points and defined locations of the anchor access points. Additionally, the computer system may update the geographic locations based at least in part on the defined of the anchor access points, and may provide, to the access points, the updated geographic locations.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 28, 2024
    Applicant: ARRIS Enterprises LLC
    Inventors: See Ho Ting, Cheng-Ming Chien, Kuan-Chih Chou, Lin Zeng, Chih-Ming Lam, Wei Xiang Ng, Arsalan Habib, Anand Krishnamachari
  • Patent number: 11943030
    Abstract: A method for wireless communication performed by a user equipment (UE) is provided. The UE includes a plurality of antenna panels. The method includes transmitting, to a Base Station (BS), a UE capability message that includes a number of the plurality of antenna panels; and transmitting, to the BS, a panel report that includes information of the plurality of antenna panels, the information associated with at least one of a Synchronization Signal Block (SSB) and a Channel State Information Reference Signal (CSI-RS).
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: March 26, 2024
    Assignee: FG Innovation Company Limited
    Inventors: Chia-Hao Yu, Hsin-Hsi Tsai, Chie-Ming Chou
  • Patent number: 11943785
    Abstract: A method for PDCCH monitoring performed by a UE is provided. The method includes performing the PDCCH monitoring in a first group associated with at least one first PDCCH monitoring configuration; receiving, from a base station, DCI comprising an indicator; performing the PDCCH monitoring in a second group associated with at least one second PDCCH monitoring configuration; and stopping the PDCCH monitoring in the first group after receiving the indicator.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: March 26, 2024
    Assignee: FG Innovation Company Limited
    Inventors: Wan-Chen Lin, Chie-Ming Chou, Tsung-Hua Tsai, Yu-Hsin Cheng
  • Publication number: 20240094783
    Abstract: An example computing device includes a first housing portion, a second housing portion moveably connected to the first housing portion, a link to selectively secure the second housing portion to the first housing portion to inhibit movement of the second housing portion relative to the first housing portion, and a shape-memory alloy element to release the link to allow the second housing portion to move relative to the first housing portion.
    Type: Application
    Filed: September 15, 2022
    Publication date: March 21, 2024
    Inventors: Yu-Wen LIN, Chia-Ming TSAI, Shih-Jen CHOU, John Joseph GRODEN
  • Patent number: 11937327
    Abstract: A user equipment (UE) and a method performed by the UE are provided. The method includes transitioning from a radio resource control (RRC) inactive (RRC_INACTIVE) state to an RRC idle (RRC_IDLE) state upon determining that the UE has failed to find a suitable cell and camped on an acceptable cell; and discarding a radio access network (RAN) notification area (RNA) configuration that comprises at least one of a list of tracking area identities (IDs) or a list of RAN area IDs in response to the transitioning from the RRC_INACTIVE state to the RRC_IDLE state. The acceptable cell fulfills a minimum set of requirements to initiate an emergency call and to receive one or more Earthquake & Tsunami Warning System (ETWS) and Commercial Mobile Alert System (CMAS) notifications. The suitable cell provides normal services. The acceptable cell provides limited services.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: March 19, 2024
    Assignee: FG Innovation Company Limited
    Inventors: Mei-Ju Shih, Yung-Lan Tseng, Hung-Chen Chen, Chie-Ming Chou
  • Publication number: 20240089611
    Abstract: The present invention relates to a method of image fusion, which uses the brightness difference of the current frame and the previous frame to determine whether the pixel in a frame image is static or dynamic. If the current pixel is static, the previous corresponding pixel is superimposed onto the current pixel; if the current pixel is dynamic, the previous corresponding pixel is replaced with the current pixel.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 14, 2024
    Inventors: Ping-Hung Yin, Yung-Ming Chou, Bo-Jia Lin, Yu-Sheng Liao
  • Publication number: 20240090019
    Abstract: A method for LBT failure detection performed by a UE is provided. The method includes: receiving, by a MAC entity of the UE, an LBT failure indication from a lower layer for all UL transmissions; increasing an LBT failure counter when the MAC entity receives the LBT failure indication; determining an LBT failure event occurs when the LBT failure counter is greater than or equal to a threshold; and resetting the LBT failure counter after the MAC entity has not received the LBT failure indication for a time period.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 14, 2024
    Inventors: Hung-Chen Chen, Chie-Ming Chou, Chia-Hung Wei, Mei-Ju Shih
  • Publication number: 20240087961
    Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Ju CHOU, Chih-Chung Chang, Jun-Ming Kuo, Che-Yuan Hsu, Pei-Ling Kao, Chen-Hsuan Liao
  • Publication number: 20240089608
    Abstract: The present invention relates to a dynamic image generating method and a dynamic image sensor thereof. The dynamic image sensor includes a first exposure pixel, a second exposure pixel and an image processing module. The dynamic image sensor applies the dynamic image generating method, which generates the default short-exposure image signal by exposing the first exposure pixel for default short-exposure time, and exposing the second exposure pixel for default long-exposure time to generate the default long-exposure image signal. The image processing module confirms whether the default short-exposure image and the default long-exposure image signals are between the lower and upper limits of pinching.
    Type: Application
    Filed: August 25, 2023
    Publication date: March 14, 2024
    Inventors: Ping-Hung Yin, Yung-Ming Chou
  • Patent number: 11929767
    Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: March 12, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chieh-Hsun Hsiao, Ming-Chou Wu, Wen-Chang Lee, Narayanan Baskaran, Wei-Hsin Tseng, Jenwei Ko, Po-Sen Tseng, Hsin-Hung Chen, Chih-Yuan Lin, Caiyi Wang
  • Patent number: 11926266
    Abstract: An installing module includes a seat bracket, a plurality of lower gaskets, a device bracket and an upper gasket. The seat bracket includes a first locking plate and a second locking plate locked to each other. The first locking plate includes a first concave and the second locking plate includes a second concave corresponding to the first concave. The lower gaskets are respectively disposed on the first concave and the second concave. The lower gaskets face each other and jointly define a lower assembly hole and are disposed on a lower side of a head-support fixer of a car seat. The device bracket is locked to the seat bracket and an electronic device is pivotally coupled to the device bracket. The upper gasket is disposed between the device bracket and the head-support fixer, and the head-support fixer is clamped between the upper gasket and the lower gaskets.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: March 12, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Shih-Wei Yeh, Chien-Chih Lin, Yi-Ming Chou, Chun-Chieh Chang
  • Publication number: 20240079268
    Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Kuo-Ming Wu, Sheng-Chan Li
  • Patent number: 11918329
    Abstract: A physiological detection device includes system including a first array PPG detector, a second array PPG detector, a display and a processing unit. The first array PPG detector is configured to generate a plurality of first PPG signals. The second array PPG detector is configured to generate a plurality of second PPG signals. The display is configured to show a detected result of the physiological detection system. The processing unit is configured to convert the plurality of first PPG signals and the plurality of second PPG signals to a first 3D energy distribution and a second 3D energy distribution, respectively, and control the display to show an alert message.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: March 5, 2024
    Assignee: PIXART IMAGING INC.
    Inventors: Chiung-Wen Lin, Wei-Ru Han, Yang-Ming Chou, Cheng-Nan Tsai, Ren-Hau Gu, Chih-Yuan Chuang