Patents by Inventor Ming-Chun Laio

Ming-Chun Laio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070007669
    Abstract: A wire-bonding method and a semiconductor package using the same are provided. The semiconductor package includes a carrier; a chip mounted on the carrier; a plurality of first wires and second wires alternatively arranged in a stagger manner, with a wire loop of each second wire being downwardly bent to form a deformed portion so as to provide a height different between the wire loops of each first wire and each second wire, wherein the first and second wires electrically connect the chip to the carrier; and an encapsulant for encapsulating the chip, the first wires, the second wires and a portion of the carrier. The height difference between the wire loops of each first wire and each second wire increases a pitch between adjacent first and second wires thereby preventing the wires from contact and short circuit with each other due to wire sweep during an encapsulation process.
    Type: Application
    Filed: September 15, 2006
    Publication date: January 11, 2007
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Chin-Teng Hsu, Ming-Chun Laio, Holman Chen, Chun-Yuan Li, Fu-Di Tang
  • Patent number: 7126229
    Abstract: A wire-bonding method and a semiconductor package using the same are provided. The semiconductor package includes a carrier; a chip mounted on the carrier; a plurality of first wires and second wires alternatively arranged in a stagger manner, with a wire loop of each second wire being downwardly bent to form a deformed portion so as to provide a height different between the wire loops of each first wire and each second wire, wherein the first and second wires electrically connect the chip to the carrier; and an encapsulant for encapsulating the chip, the first wires, the second wires and a portion of the carrier. The height difference between the wire loops of each first wire and each second wire increases a pitch between adjacent first and second wires thereby preventing the wires from contact and short circuit with each other due to wire sweep during an encapsulation process.
    Type: Grant
    Filed: July 19, 2004
    Date of Patent: October 24, 2006
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chin-Teng Hsu, Ming-Chun Laio, Holman Chen, Chun-Yuan Li, Fu-Di Tang
  • Publication number: 20050173791
    Abstract: A wire-bonding method and a semiconductor package using the same are provided. The semiconductor package includes a carrier; a chip mounted on the carrier; a plurality of first wires and second wires alternatively arranged in a stagger manner, with a wire loop of each second wire being downwardly bent to form a deformed portion so as to provide a height different between the wire loops of each first wire and each second wire, wherein the first and second wires electrically connect the chip to the carrier; and an encapsulant for encapsulating the chip, the first wires, the second wires and a portion of the carrier. The height difference between the wire loops of each first wire and each second wire increases a pitch between adjacent first and second wires thereby preventing the wires from contact and short circuit with each other due to wire sweep during an encapsulation process.
    Type: Application
    Filed: July 19, 2004
    Publication date: August 11, 2005
    Inventors: Chin-Teng Hsu, Ming-Chun Laio, Holman Chen, Chun-Yuan Li, Fu-Di Tang
  • Patent number: 6696750
    Abstract: A semiconductor package with a heat dissipating structure is provided, including a lead frame with a die pad for allowing a chip to be mounted on an upper surface of the die pad, and a heat sink abutting against a lower surface of the die pad. A top surface of the heat sink, in contact with the lower surface of the die pad, is formed with at least a recessed portion. During a molding process of using a resin material to form an encapsulant for encapsulating the chip, lead frame and heat sink, the resin material fills into the recessed portion and forms a supporting member between the die pad and heat sink to provide support for a central portion of the die pad, so as to prevent the chip from cracking in a step of building up a packing pressure of the molding process, thereby assuring yield and reliability of fabricated products.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: February 24, 2004
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Cha-Yun Yin, Ming-Chun Laio, Fu-Di Tang, Chien-Ping Huang