Abstract: In an embodiment, a method of forming a semiconductor device includes forming a dummy gate stack over a substrate; forming a first spacer layer over the dummy gate stack; oxidizing a surface of the first spacer layer to form a sacrificial liner; forming one or more second spacer layers over the sacrificial liner; forming a third spacer layer over the one or more second spacer layers; forming an inter-layer dielectric (ILD) layer over the third spacer layer; etching at least a portion of the one or more second spacer layers to form an air gap, the air gap being interposed between the third spacer layer and the first spacer layer; and forming a refill layer to fill an upper portion of the air gap.

Abstract: A cord divider is positioned on both sides of the cord winder of the control box of a cordless window curtain. Each cord divider is equipped with protrusions and crosspieces. When the cords are pulled out from the cord divider, the cords do not tangle or knot. The cords are wound up on the driving gear set, and the driving cord device prevents the cords from overlapping and causing uneven heights on both sides of the curtain. The use of cylinders in the cord dividers prevents excessive friction of the cords during use. There is no need to change the current cooperation way between the cords and the cord winder.

Abstract: A method for forming a honeycomb curtain and includes a weaving process, a fixing process, a gluing process, a stacking process and a cutting process. The honeycomb curtain includes multiple netted tubes, and each netted tube includes an upper portion and a lower portion. The central portion of each of the upper and lower portions is woven to form a tight-woven structure. Two sides of each of the central portions are woven to form a sparse-woven structure to form the upper portion to be a breathable first semi-transparent strip and to form the lower portion to be a second semi-transparent strip. The outer corner of each of the upper and lower portions are woven to form another tight-woven structure. The central portions of each of the netted tubes are applied with glue on respective outer face thereof. The netted tubes are stacked and pressed to form a layered structure.

Abstract: In an embodiment, a method of forming a semiconductor device includes forming a dummy gate stack over a substrate; forming a first spacer layer over the dummy gate stack; oxidizing a surface of the first spacer layer to form a sacrificial liner; forming one or more second spacer layers over the sacrificial liner; forming a third spacer layer over the one or more second spacer layers; forming an inter-layer dielectric (ILD) layer over the third spacer layer; etching at least a portion of the one or more second spacer layers to form an air gap, the air gap being interposed between the third spacer layer and the first spacer layer; and forming a refill layer to fill an upper portion of the air gap.

Abstract: A method of forming a gas spacer in a semiconductor device and a semiconductor device including the same are disclosed. In accordance with an embodiment, a method includes forming a gate stack over a substrate; forming a first gate spacer on sidewalls of the gate stack; forming a second gate spacer on sidewalls of the first gate spacer; removing the second gate spacer using an etching process to form a first opening, the etching process being performed at a temperature less than 0° C., the etching process using an etching solution including hydrogen fluoride; and depositing a dielectric layer over the first gate spacer and the gate stack, the dielectric layer sealing a gas spacer in the first opening.

Abstract: A semiconductor device includes a fin extending from a substrate and including a first fin end, a separation structure separating the first fin end from an adjacent fin end of another fin, a dummy gate spacer along sidewalls of the separation structure and the fin, a first epitaxial source/drain region in the fin and adjacent the separation structure, and a residue of a dummy gate material in a corner region between the dummy gate spacer and the first fin end. The first fin end protrudes from the dummy gate spacer into the separation structure. The residue of the dummy gate material separates the first epitaxial source/drain region from the separation structure and is triangle shaped.

Abstract: A power line structure includes a dielectric layer, a first conductive component, a second conductive component, and a third conductive component. The first conductive component is disposed at a first side of the dielectric layer. The second conductive component is disposed at the first side of the dielectric layer. The third conductive component is disposed at the first side of the dielectric layer and between the first conductive component and the second conductive component. Each of the voltage of the first conductive component and the second conductive component is equal to a ground voltage. The third conductive component is configured to receive a first power voltage.

Abstract: The application discloses a measuring system and associated method for measuring phases of IMD3 signals generated from a power amplifier. The method includes: performing a phase estimation process, including a plurality of sub-processes, wherein each sub-process includes: generating a first main signal, a second main signal, a first adjustable signal, wherein frequencies of the first main signal, the second main signal, the first adjustable signal are f1, f2, 2f1-f2; and correspondingly measuring a first power at frequency of 2f1-f2; and estimating a phase of the IMD3 signal at frequency of 2f1-f2 caused by the first main signal and the second main signal passing through the power amplifier according to a plurality of first powers obtained from the plurality of sub-processes; wherein in each sub-process, a phase of the first adjustable signal is different from that of other sub-processes.

Abstract: A signal adjustment device includes a frequency adjustment circuit, a filter circuit, and a power estimation circuit. The frequency adjustment circuit is configured to receive a two-tone signal from a signal generator and to generate a first signal according to the two-tone signal, wherein the signal generator generates the two-tone signal according to a first coefficient and a second coefficient. The filter circuit is configured to filter the first signal, in order to generate a second signal. The power estimation circuit is configured to detect a power of an intermodulation distortion from the third order signal component, which is associated with the two-tone signal, in the second signal, and to adjust at least one of the first coefficient and the second coefficient according to the power, in order to reduce the power.

Abstract: An testing method includes following operations: generating, by a signal generator, a multi-tone signal; transmitting, by the signal generator, the multi-tone signal to an input terminal of an under-test device; measuring, by a spectrum analyzer, the input terminal of the under-test device and an output terminal of the under-test device to acquire a plurality of input ripple intensities corresponding to a plurality of frequencies and acquire a plurality of output ripple intensities corresponding to the frequencies; and generating, by a control device, a plurality of power supply rejection ratios corresponding to the frequencies according to the input ripple intensities and the output ripple intensities.

Abstract: A signal adjustment device includes a frequency adjustment circuit, a filter circuit, and a power estimation circuit. The frequency adjustment circuit is configured to receive a two-tone signal from a signal generator and to generate a first signal according to the two-tone signal, wherein the signal generator generates the two-tone signal according to a first coefficient and a second coefficient. The filter circuit is configured to filter the first signal, in order to generate a second signal. The power estimation circuit is configured to detect a power of an intermodulation distortion from the third order signal component, which is associated with the two-tone signal, in the second signal, and to adjust at least one of the first coefficient and the second coefficient according to the power, in order to reduce the power.

Abstract: A power line structure includes a dielectric layer, a first conductive component, a second conductive component, and a third conductive component. The first conductive component is disposed at a first side of the dielectric layer. The second conductive component is disposed at the first side of the dielectric layer. The third conductive component is disposed at the first side of the dielectric layer and between the first conductive component and the second conductive component. Each of the voltage of the first conductive component and the second conductive component is equal to a ground voltage. The third conductive component is configured to receive a first power voltage.

Abstract: A signal compensation device comprises a first filter circuit, for processing a broadband signal, to generate a first analog time-domain signal; a second filter circuit, for processing the broadband signal, to generate a second analog time-domain signal; a first transform circuit, for transforming the first analog time-domain signal to a first digital time-domain signal; a second transform circuit, for transforming the second analog time-domain signal to a second digital time-domain signal; a third transform circuit, for transforming the first digital time-domain signal to a first frequency-domain signal; a fourth transform circuit, for transforming the second digital time-domain signal to a second frequency-domain signal; and a processing circuit, for generating a time-domain compensation response according to the first frequency-domain signal and the second frequency-domain signal.

Abstract: A signal compensation device comprises a first filter circuit, for processing a broadband signal, to generate a first analog time-domain signal; a second filter circuit, for processing the broadband signal, to generate a second analog time-domain signal; a first transform circuit, for transforming the first analog time-domain signal to a first digital time-domain signal; a second transform circuit, for transforming the second analog time-domain signal to a second digital time-domain signal; a third transform circuit, for transforming the first digital time-domain signal to a first frequency-domain signal; a fourth transform circuit, for transforming the second digital time-domain signal to a second frequency-domain signal; and a processing circuit, for generating a time-domain compensation response according to the first frequency-domain signal and the second frequency-domain signal.

Abstract: A receiving circuit includes: a first receiving terminal for receiving a RF signal; a second receiving terminal for receiving an external oscillating signal generated by an external oscillator; a low-noise amplifier coupled with the first receiving terminal and the second receiving terminal and utilized for generating an output signal; a first switch element positioned between the second receiving terminal and the low-noise amplifier; an in-phase signal processing circuit for generating an in-phase detection signal based on the output signal; an quadrature signal processing circuit for generating an quadrature detection signal based on the output signal; and a calibration circuit for controlling the first switch element and capable of performing an I/Q mismatch calibration operation according to the in-phase detection signal and the quadrature detection signal when the first switch element is turned on.

Abstract: A receiving circuit includes: a first receiving terminal for receiving a RF signal; a second receiving terminal for receiving an external oscillating signal generated by an external oscillator; a low-noise amplifier coupled with the first receiving terminal and the second receiving terminal and utilized for generating an output signal; a first switch element positioned between the second receiving terminal and the low-noise amplifier; an in-phase signal processing circuit for generating an in-phase detection signal based on the output signal; an quadrature signal processing circuit for generating an quadrature detection signal based on the output signal; and a calibration circuit for controlling the first switch element and capable of performing an I/Q mismatch calibration operation according to the in-phase detection signal and the quadrature detection signal when the first switch element is turned on.

Abstract: The present invention discloses a wireless signal receiving device and method capable of receiving three or more signals of different central frequencies. An embodiment of said device comprises: a receiving circuit operable to generate a reception signal according to a wireless signal including a first, second, and third wireless signals of different central frequencies; a mixer operable to generate a mixing signal by processing the reception signal according to an oscillation clock in which the mixing signal includes a first, second and third intermediate-frequency (IF) signals and the central frequency of the third IF signal is higher than the other two; and a digital signal generating circuit operable to generate a first, second and third digital signals by processing the first, second and third IF signals according to a sampling frequency in which the sampling frequency is lower than two times the maximum frequency of the third IF signal.

Abstract: A method for detecting frequency offset of an oscillator includes: receiving an oscillation signal having an oscillation frequency; generating a self-mixing signal according to the oscillation signal; performing frequency division upon the self-mixing signal to obtain a down-converted self-mixing signal; obtaining a down-converted self-mixing frequency corresponding to a maximum power in a specific frequency range of the down-converted self-mixing signal; and computing a frequency offset of the oscillation frequency according to at least the oscillation frequency and the down-converted self-mixing frequency. A related circuit is also disclosed.

Abstract: The present invention discloses a wireless signal receiving device and method capable of receiving three or more signals of different central frequencies. An embodiment of said device comprises: a receiving circuit operable to generate a reception signal according to a wireless signal including a first, second, and third wireless signals of different central frequencies; a mixer operable to generate a mixing signal by processing the reception signal according to an oscillation clock in which the mixing signal includes a first, second and third intermediate-frequency (IF) signals and the central frequency of the third IF signal is higher than the other two; and a digital signal generating circuit operable to generate a first, second and third digital signals by processing the first, second and third IF signals according to a sampling frequency in which the sampling frequency is lower than two times the maximum frequency of the third IF signal.

Abstract: An oscillating frequency drift detecting method, which comprises: receiving an oscillating signal with an oscillating frequency, wherein the oscillating signal is generated by a crystal oscillator; generating a self-mixing signal according to the oscillating signal; obtaining a self-mixing frequency of a maximum power of the self-mixing signal in a specific frequency range; and computing a frequency drift of the oscillating frequency, according to the self-mixing frequency of the maximum power, and the oscillating frequency.