Abstract: A mobile wireless communications device and methods therefore, including receiving a signal (710), storing a portion of the received signal (730), identifying all possible pilot signals by determining slot boundary information for the stored signal portion (720), determining frame boundary information and/or scrambling code information (760) of the stored signal portion by correlating the stored signal portion with the scrambling codes based on the slot boundary information. In other embodiments, the search is performed in real-time without storing the signal.

Abstract: A mobile wireless communications device and methods therefore, including receiving a signal (710), storing a portion of the received signal (730), identifying all possible pilot signals by determining slot boundary information for the stored signal portion (720), determining frame boundary information and/or scrambling code information (760) of the stored signal portion by correlating the stored signal portion with the scrambling codes based on the slot boundary information. In other embodiments, the search is performed in real-time without storing the signal.

Abstract: A method and apparatus for increasing the speed of a Universal Asynchronous Receiver/Transmitter ("UART") while maintaining backward compatibility. The UART contains registers for controlling the flow of data. Two registers are the DLL (Divisor Latch Least significant) internal register and the DLM (Divisor Latch Most significant) internal register. Due to the UART not using all of the 16 bits contained in the DLL and DLM registers, an additional register, the Increased Baudrate (IB) register, is created. The IB register uses bits which are unused (or always set to zero in a conventional UART). Through the IB register, the UART may use higher crystal frequencies. In addition, when the UART is at speeds equal to or less than 115,200 bits per second, the IB register is programmed to zero, thus mimicking the operation of a convention UART at speeds equal to or less than 115,200 bits per second. Thus, the method and system for a high speed UART increases speeds while still maintaining backward compatibility.

Abstract: A system and method for providing an alternate AC voltage to an electrical load having a main AC voltage. The system and method include a signal generator for generating a main AC voltage signal representing the value of the main AC voltage, and a processor for processing the main AC voltage signal to determine a status of the main AC voltage, a main AC voltage failure time period, and a main AC voltage restoration time period. The system and method also include a control signal generator for generating a control signal in response to the main AC voltage signal, the main AC voltage failure time period, the main AC voltage restoration time period, and a pre-selected delay time period, and a switch for switching the electrical load between the main AC voltage and the alternate AC voltage in response to the control signal.