Abstract: A semiconductor device includes a substrate; a first thermoelectric conduction leg, disposed on the substrate, and doped with a first type of dopant; a second thermoelectric conduction leg, disposed on the substrate, and doped with a second type of dopant, wherein the first and second thermoelectric conduction legs are spatially spaced from each other but disposed along a common row on the substrate; and a first intermediate thermoelectric conduction structure, disposed on a first end of the second thermoelectric conduction leg, and doped with the first type of dopant.

Abstract: A semiconductor device includes a substrate; a first thermoelectric conduction leg, disposed on the substrate, and doped with a first type of dopant; a second thermoelectric conduction leg, disposed on the substrate, and doped with a second type of dopant, wherein the first and second thermoelectric conduction legs are spatially spaced from each other but disposed along a common row on the substrate; and a first intermediate thermoelectric conduction structure, disposed on a first end of the second thermoelectric conduction leg, and doped with the first type of dopant.

Abstract: A semiconductor device and method of making same are disclosed. In some embodiments, a method includes: forming a first thermoelectric conduction leg on a substrate; forming a second thermoelectric conduction leg on the substrate to be aligned with the first thermoelectric conduction leg along a same row; forming at least one intermediate thermoelectric conduction structure on an end of the second thermoelectric conduction leg; forming a contact structure to couple the first and second thermoelectric conduction legs via the at least one intermediate thermoelectric conduction structure; and recessing the substrate to form at least one trench substantially adjacent to a respective side edge of either the first thermoelectric conduction leg or the second thermoelectric conduction leg.

Abstract: A semiconductor device and method of making same are disclosed. In some embodiments, a method includes: forming a first thermoelectric conduction leg on a substrate; forming a second thermoelectric conduction leg on the substrate to be aligned with the first thermoelectric conduction leg along a same row; forming at least one intermediate thermoelectric conduction structure on an end of the second thermoelectric conduction leg; forming a contact structure to couple the first and second thermoelectric conduction legs via the at least one intermediate thermoelectric conduction structure; and recessing the substrate to form at least one trench substantially adjacent to a respective side edge of either the first thermoelectric conduction leg or the second thermoelectric conduction leg.

Abstract: A semiconductor device includes a substrate; a first thermoelectric conduction leg, disposed on the substrate, and doped with a first type of dopant; a second thermoelectric conduction leg, disposed on the substrate, and doped with a second type of dopant, wherein the first and second thermoelectric conduction legs are spatially spaced from each other but disposed along a common row on the substrate; and a first intermediate thermoelectric conduction structure, disposed on a first end of the second thermoelectric conduction leg, and doped with the first type of dopant.

Abstract: A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.

Abstract: A semiconductor device includes a substrate; a first thermoelectric conduction leg, disposed on the substrate, and doped with a first type of dopant; a second thermoelectric conduction leg, disposed on the substrate, and doped with a second type of dopant, wherein the first and second thermoelectric conduction legs are spatially spaced from each other but disposed along a common row on the substrate; and a first intermediate thermoelectric conduction structure, disposed on a first end of the second thermoelectric conduction leg, and doped with the first type of dopant.

Abstract: A connector for positioning at a circuit board is disclosed. The connector includes a hollow base and a number of contact points. The hollow base enables the connector to firmly sit at the circuit board and encompasses an electronic device therein. The contact points are at the bottom surface of the hollow base for electrically coupling with the circuit board. Another combination type connector is also disclosed. The combination type connector includes an external connector and an internal connector. The external connector includes a hollow base and a number of first contact points at its bottom surface. The hollow base enables the connector to firmly sit at the circuit board and encompasses an electronic device on the circuit board. The first contact points are electrically coupled with the circuit board. The internal connector is at the hollow base of the external connector and has the second contact points for electrically connecting with the circuit board.

Abstract: The present invention relates to a single-resistor-foil pressure sensitive coordinate input system, which comprises: a resistor foil surrounded by a frame, and a base with a copper plate covered by the resistor foil and an control circuit. The frame has four corners, which each have an electrode. The base has four corners, which respectively contact the electrodes of the four corners of the resistor foil and connect to the control circuit. The control circuit has transistors as electronic switches, and the copper plate has a terminal, which is connected to the electronic switches. When the resistor foil contacts the base and a voltage is applied on the resistor foil, by switching the electronic switches, a coordinate measurement is performed.