Abstract: A method of forming semiconductor structure includes attaching backsides of top dies to a front side of a bottom wafer, the bottom wafer comprising a plurality of bottom dies; forming first conductive pillars on the front side of the bottom wafer adjacent to the top dies; forming a first dielectric material on the front side of the bottom wafer around the top dies and around the first conductive pillars; and dicing the bottom wafer to form a plurality of structures, each of the plurality of structures comprising at least one of the top dies and at least one of the bottom dies.

Abstract: A 3DIC structure includes a die, a conductive terminal, and a dielectric structure. The die is bonded to a carrier through a bonding film. The conductive terminal is disposed over and electrically connected to the die. The dielectric structure comprises a first dielectric layer and a second dielectric layer. The first dielectric layer is disposed laterally aside the die. The second dielectric layer is disposed between the first dielectric layer and the bonding film, and between the die and the boding film. A second edge of the second dielectric layer is more flat than a first edge of the first dielectric layer.

Abstract: The present disclosure provides a semiconductor package, including a first semiconductor structure, including an active region in a first substrate portion, wherein the active region includes at least one of a transistor, a diode, and a photodiode, a first bonding metallization over the first semiconductor structure, a first bonding dielectric over the first semiconductor structure, surrounding and directly contacting the first bonding metallization, a second semiconductor structure over a first portion of the first semiconductor structure, wherein the second semiconductor structure includes a conductive through silicon via, a second bonding dielectric at a back surface of the second semiconductor structure, a second bonding metallization surrounded by the second bonding dielectric and directly contacting the second bonding dielectric, and a conductive through via over a second portion of the first semiconductor structure different from the first portion.

Abstract: A package includes a redistribution structure, a die package on a first side of the redistribution structure including a first die connected to a second die by metal-to-metal bonding and dielectric-to-dielectric bonding, a dielectric material over the first die and the second die and surrounding the first die, and a first through via extending through the dielectric material and connected to the first die and a first via of the redistribution structure, a semiconductor device on the first side of the redistribution structure includes a conductive connector, wherein a second via of the redistribution structure contacts the conductive connector of the semiconductor device, a first molding material on the redistribution structure and surrounding the die package and the semiconductor device, and a package through via extending through the first molding material to contact a third via of the redistribution structure.

Abstract: A manufacturing method of a semiconductor structure is provided. A first semiconductor die includes a first semiconductor substrate, a first interconnect structure formed thereon, a first bonding conductor formed thereon, and a conductive via extending from the first interconnect structure toward a back surface of the first semiconductor substrate. The first semiconductor substrate is thinned to accessibly expose the conductive via to form a through semiconductor via (TSV). A second semiconductor die is bonded to the first semiconductor die. The second semiconductor die includes a second semiconductor substrate including an active surface facing the back surface of the first semiconductor substrate, a second interconnect structure between the second and the first semiconductor substrates, and a second bonding conductor between the second interconnect structure and the first semiconductor substrate and bonded to the TSV.

Abstract: A semiconductor device including a first die and a second die bonded to one another. The first die includes a first passivation layer over a substrate, and first bond pads in the first passivation layer. The second die includes a second passivation layer, which may be bonded to the first passivation layer, and second bond pads in the second passivation layer, which may be bonded to the first bond pads. The second bond pads include inner bond pads and outer bond pads. The outer bond pads may have a greater diameter than the inner bond pads as well as the first bond pads.

Abstract: A full-color display device is disclosed. The present invention comprises a plurality of pixel units each comprising a base, a plurality of transparent conductive substrates, a plurality of light emitting elements, and a plurality of electrode parts. The base has at least three openings formed thereon, the bottom of each opening is a reflective surface, and each of the transparent conductive substrates individually covers each opening. Each of the light emitting elements is individually disposed on one side of each transparent conductive substrate and held in each opening. Each of the electrode parts is formed on the base and electrically connected to the electrodes of the light emitting elements and the transparent conductive substrates.

Abstract: A full-color display device is disclosed. The present invention comprises a plurality of pixel units each comprising a base, a plurality of transparent conductive substrates, a plurality of light emitting elements, and a plurality of electrode parts. The base has at least three openings formed thereon, the bottom of each opening is a reflective surface, and each of the transparent conductive substrates individually covers each opening. Each of the light emitting elements is individually disposed on one side of each transparent conductive substrate and held in each opening. Each of the electrode parts is formed on the base and electrically connected to the electrodes of the light emitting elements and the transparent conductive substrates.