Patents by Inventor MING-HAN HSIEH

MING-HAN HSIEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139301
    Abstract: The disclosure provides a method of active immunotherapy for a cancer patient, comprising administering vaccines against Globo series antigens (i.e., Globo H, SSEA-3 and SSEA-4). Specifically, the method comprises administering Globo H-CRM197 (OBI-833/821) in patients with cancer. The disclosure also provides a method of selecting a cancer patient who is suitable as treatment candidate for immunotherapy. Exemplary immune response can be characterized by reduction of the severity of disease, including but not limited to, prevention of disease, delay in onset of disease, decreased severity of symptoms, decreased morbidity and delayed mortality.
    Type: Application
    Filed: November 19, 2021
    Publication date: May 2, 2024
    Inventors: Ming-Tain LAI, Cheng-Der Tony YU, I-Ju CHEN, Wei-Han LEE, Chueh-Hao YANG, Chun-Yen TSAO, Chang-Lin HSIEH, Chien-Chih OU, Chen-En TSAI
  • Publication number: 20240145421
    Abstract: Provided are a passivation layer for forming a semiconductor bonding structure, a sputtering target making the same, a semiconductor bonding structure and a semiconductor bonding process. The passivation layer is formed on a bonding substrate by sputtering the sputtering target; the passivation layer and the sputtering target comprise a first metal, a second metal or a combination thereof. The bonding substrate comprises a third metal. Based on a total atom number of the surface of the passivation layer, O content of the surface of the passivation layer is less than 30 at %; the third metal content of the surface of the passivation layer is less than or equal to 10 at %. The passivation layer has a polycrystalline structure. The semiconductor bonding structure sequentially comprises a first bonding substrate, a bonding layer and a second bonding substrate: the bonding layer is mainly formed by the passivation layer and the third metal.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 2, 2024
    Inventors: Kuan-Neng CHEN, Zhong-Jie HONG, Chih-I CHO, Ming-Wei WENG, Chih-Han CHEN, Chiao-Yen WANG, Ying-Chan HUNG, Hong-Yi WU, CHENG-YEN HSIEH
  • Patent number: 11971565
    Abstract: An absorption type near-infrared filter comprising a first multilayer film, a second multilayer film, and an absorption film, wherein in the ultraviolet band, the difference of between the wavelength with the transmittance at 80% of the absorbing film and the wavelength with the reflectivity at 80% of the first multilayer film falls in the range between 25 nm and 37 nm, the difference of between the wavelength with the transmittance at 50% of the absorbing film and the wavelength with the reflectivity at 50% of the first multilayer film falls in the range between 6 nm and 14 nm, and the difference of between the wavelength with the transmittance at 20% of the absorbing film and the wavelength with the reflectivity at 20% of the first multilayer film falls in the range between ?6 nm and 2.5 nm.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: April 30, 2024
    Assignees: PTOT (SUZHOU) INC., PLATINUM OPTICS TECHNOLOGY INC.
    Inventors: Chung-Han Lu, Hsiao-Ching Shen, Chun-Cheng Hsieh, Ming-Zhan Wang
  • Patent number: 11611334
    Abstract: A duty margin monitoring circuit, coupled to a functional circuit which generates a first output signal in response to a target signal, includes a modulation circuit, a replica circuit and an error detection circuit. The modulation circuit is arranged to receive the target signal and modulate the target signal to generate a modulated target signal. The replica circuit is arranged to receive the modulated target signal and generate a second output signal in response to the modulated target signal. The error detection circuit is coupled to the functional circuit and the replica circuit to receive the first output signal and the second output signal and arranged to generate an error detection result according to the first output signal and the second output signal.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: March 21, 2023
    Assignee: MEDIATEK INC.
    Inventors: Shou-En Liu, Wen-Sung Chiang, Ming-Han Hsieh, Keng-Jui Chang, Lin-Chien Chen
  • Publication number: 20220166412
    Abstract: A duty margin monitoring circuit, coupled to a functional circuit which generates a first output signal in response to a target signal, includes a modulation circuit, a replica circuit and an error detection circuit. The modulation circuit is arranged to receive the target signal and modulate the target signal to generate a modulated target signal. The replica circuit is arranged to receive the modulated target signal and generate a second output signal in response to the modulated target signal. The error detection circuit is coupled to the functional circuit and the replica circuit to receive the first output signal and the second output signal and arranged to generate an error detection result according to the first output signal and the second output signal.
    Type: Application
    Filed: October 18, 2021
    Publication date: May 26, 2022
    Applicant: MEDIATEK INC.
    Inventors: Shou-En Liu, Wen-Sung Chiang, Ming-Han Hsieh, Keng-Jui Chang, Lin-Chien Chen
  • Patent number: 8832615
    Abstract: A method for detecting anomalies in signal behaviors in a simulation of a low power IC includes receiving a circuit design and a power specification of the IC, determining at least one power sequence checking rule from the power specification, simulating the circuit design and the power specification to obtain a dump file, identifying at least one anomaly of the at least one power sequence checking rule based on the dump file, and generating information relevant to the identified anomaly of the at least one power sequence checking rule. The method further includes setting up a context in a debugger for debugging the anomaly by displaying a waveform of misbehaved signals associated with the anomaly in a waveform window, and a portion of the circuit design and/or a portion of the power specification associated with the anomaly in a text window.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: September 9, 2014
    Assignees: Synopsys, Inc., Synopsys Taiwan Co., Ltd.
    Inventors: Ming Han Hsieh, Chih-Neng Hsu, Ming-Hui Hsieh
  • Publication number: 20130305207
    Abstract: A method for detecting anomalies in signal behaviors in a simulation of a low power IC includes receiving a circuit design and a power specification of the IC, determining at least one power sequence checking rule from the power specification, simulating the circuit design and the power specification to obtain a dump file, identifying at least one anomaly of the at least one power sequence checking rule based on the dump file, and generating information relevant to the identified anomaly of the at least one power sequence checking rule. The method further includes setting up a context in a debugger for debugging the anomaly by displaying a waveform of misbehaved signals associated with the anomaly in a waveform window, and a portion of the circuit design and/or a portion of the power specification associated with the anomaly in a text window.
    Type: Application
    Filed: May 9, 2013
    Publication date: November 14, 2013
    Applicants: Synopsys Taiwan Co. Ltd., Synopsys, Inc.
    Inventors: Ming Han Hsieh, Chih-Neng Hsu, Ming-Hui Hsieh
  • Publication number: 20120005381
    Abstract: Provided is a USB interface device includes a USB unit, a USB to digital video and digital audio module, a high-definition multimedia interface (HDMI) module, a memory control unit (MCU), and a power control module. The USB to digital video and digital audio module receives and converts video and audio signals into digital signals, which are then converted by the module to be applied to a displaying device (such as a displaying screen or a TV set). The USB to digital video and digital audio module contains a built-in EDID module to provide the optimum resolution data to the displaying device. As such, WUXGA (Widescreen Ultra. Extended Graphics Array) resolution can be realized and audio effect is supported.
    Type: Application
    Filed: June 30, 2010
    Publication date: January 5, 2012
    Inventor: MING-HAN HSIEH
  • Publication number: 20110317067
    Abstract: Provided is a device having functions of high definition conversion and audio supporting, including an analog video and audio unit, an extended display identification data (EDID) electrically-erasable programmable read-only memory (EEPROM) module, an ADC, a high-definition multimedia interface (HDMI) module, a memory control unit (MCU), and a power control module. The ADC converts an analog signal received through the analog video and audio unit into a digital signal, which is then converted by the HDMI module into an image signal to be applied to a displaying device (such as a displaying screen or a TV set). The EDID EEPROM module provides the optimum resolution to the displaying device. As such, WUXGA (Widescreen Ultra Extended Graphics Array) resolution can be realized and audio effect is supported.
    Type: Application
    Filed: June 29, 2010
    Publication date: December 29, 2011
    Inventor: MING-HAN HSIEH