Abstract: A duty margin monitoring circuit, coupled to a functional circuit which generates a first output signal in response to a target signal, includes a modulation circuit, a replica circuit and an error detection circuit. The modulation circuit is arranged to receive the target signal and modulate the target signal to generate a modulated target signal. The replica circuit is arranged to receive the modulated target signal and generate a second output signal in response to the modulated target signal. The error detection circuit is coupled to the functional circuit and the replica circuit to receive the first output signal and the second output signal and arranged to generate an error detection result according to the first output signal and the second output signal.

Abstract: A duty margin monitoring circuit, coupled to a functional circuit which generates a first output signal in response to a target signal, includes a modulation circuit, a replica circuit and an error detection circuit. The modulation circuit is arranged to receive the target signal and modulate the target signal to generate a modulated target signal. The replica circuit is arranged to receive the modulated target signal and generate a second output signal in response to the modulated target signal. The error detection circuit is coupled to the functional circuit and the replica circuit to receive the first output signal and the second output signal and arranged to generate an error detection result according to the first output signal and the second output signal.

Abstract: A method for detecting anomalies in signal behaviors in a simulation of a low power IC includes receiving a circuit design and a power specification of the IC, determining at least one power sequence checking rule from the power specification, simulating the circuit design and the power specification to obtain a dump file, identifying at least one anomaly of the at least one power sequence checking rule based on the dump file, and generating information relevant to the identified anomaly of the at least one power sequence checking rule. The method further includes setting up a context in a debugger for debugging the anomaly by displaying a waveform of misbehaved signals associated with the anomaly in a waveform window, and a portion of the circuit design and/or a portion of the power specification associated with the anomaly in a text window.

Abstract: A method for detecting anomalies in signal behaviors in a simulation of a low power IC includes receiving a circuit design and a power specification of the IC, determining at least one power sequence checking rule from the power specification, simulating the circuit design and the power specification to obtain a dump file, identifying at least one anomaly of the at least one power sequence checking rule based on the dump file, and generating information relevant to the identified anomaly of the at least one power sequence checking rule. The method further includes setting up a context in a debugger for debugging the anomaly by displaying a waveform of misbehaved signals associated with the anomaly in a waveform window, and a portion of the circuit design and/or a portion of the power specification associated with the anomaly in a text window.

Abstract: Provided is a USB interface device includes a USB unit, a USB to digital video and digital audio module, a high-definition multimedia interface (HDMI) module, a memory control unit (MCU), and a power control module. The USB to digital video and digital audio module receives and converts video and audio signals into digital signals, which are then converted by the module to be applied to a displaying device (such as a displaying screen or a TV set). The USB to digital video and digital audio module contains a built-in EDID module to provide the optimum resolution data to the displaying device. As such, WUXGA (Widescreen Ultra. Extended Graphics Array) resolution can be realized and audio effect is supported.

Abstract: Provided is a device having functions of high definition conversion and audio supporting, including an analog video and audio unit, an extended display identification data (EDID) electrically-erasable programmable read-only memory (EEPROM) module, an ADC, a high-definition multimedia interface (HDMI) module, a memory control unit (MCU), and a power control module. The ADC converts an analog signal received through the analog video and audio unit into a digital signal, which is then converted by the HDMI module into an image signal to be applied to a displaying device (such as a displaying screen or a TV set). The EDID EEPROM module provides the optimum resolution to the displaying device. As such, WUXGA (Widescreen Ultra Extended Graphics Array) resolution can be realized and audio effect is supported.