Patents by Inventor Ming-Hao Lee

Ming-Hao Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961762
    Abstract: A method includes forming a first conductive feature, depositing a passivation layer on a sidewall and a top surface of the first conductive feature, etching the passivation layer to reveal the first conductive feature, and recessing a first top surface of the passivation layer to form a step. The step comprises a second top surface of the passivation layer. The method further includes forming a planarization layer on the passivation layer, and forming a second conductive feature extending into the passivation layer to contact the first conductive feature.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Da Cheng, Tzy-Kuang Lee, Song-Bor Lee, Wen-Hsiung Lu, Po-Hao Tsai, Wen-Che Chang
  • Patent number: 11955202
    Abstract: A multilevel content addressable memory, a multilevel coding method and a multilevel searching method are provided. The multilevel coding method includes the following steps. A highest decimal value of a multilevel-bit binary data is obtained. A length of a digital string data is set as being the highest decimal value of the multilevel-bit binary data. The multilevel-bit binary data is converted into the digital string data. If a content of the multilevel-bit binary data is an exact value, a number of an indicating bit in the digital string data is the exact value.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: April 9, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ming-Hsiu Lee, Po-Hao Tseng
  • Publication number: 20240102860
    Abstract: An apparatus includes a six-axis correction stage, an auto-collimation measurement device, a light splitter, a telecentric image measurement device, and a controller. The six-axis correction stage carries a device under test; the auto-collimation measurement device is arranged above the six-axis correction stage along a measurement optical axis; the light splitter is arranged on the measurement optical axis and is interposed between the six-axis correction stage and the auto-collimation measurement device. A method controls the six-axis correction stage to correct rotation errors in at least two degrees of freedom of the device under test according to a measurement result of the auto-collimation measurement device, and controls the six-axis correction stage to correct translation and yaw errors in at least three degrees of freedom of the device under test according to a measurement result of the telecentric image measurement device by means of the controller.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 28, 2024
    Inventors: Cheng Chih HSIEH, Tien Chi WU, Ming-Long LEE, Yu-Hsuan LIN, Tsung-I LIN, Chien-Hao MA
  • Publication number: 20240105750
    Abstract: A CMOS image sensor includes PDAF pixels distributed in an array of image pixels in plan view. Each PDAF pixel includes m×m binned photodiodes, a PDAF color filter overlying the binned photodiodes and laterally surrounded by a first isolation structure, and a PDAF micro-lens overlying the PDAF color filter. A first horizontal distance between a center of the PDAF color filter and a center of the binned photodiodes varies depending on a location of the PDAF pixel in plan view in the CMOS image sensor. Additionally, the first isolation structure includes a first low-n dielectric grid, a second low-n dielectric grid underlying the first low-n dielectric grid, and a metal grid enclosed by the second low-n dielectric grid. The second low-n dielectric grid includes a filler dielectric material different from a second low-n dielectric grid material. Thus, quantum efficiency and uniformity of the CMOS image sensor are improved.
    Type: Application
    Filed: February 16, 2023
    Publication date: March 28, 2024
    Inventors: Ming-Hsien YANG, Chun-Hao Chou, Kuo-Cheng Lee
  • Publication number: 20240090238
    Abstract: A memory device and a method for manufacturing the memory device are provided. The memory device includes a stack and a plurality of memory strings. The stack is disposed on the substrate, and the stack includes a plurality of conductive layers and a plurality of insulating layers alternately stacked. The memory strings pass through the stack along a first direction, wherein a first memory string in the memory strings includes a first conductive pillar and a second conductive pillar, a channel layer, and a memory structure. The first conductive pillar and the second conductive pillar respectively extend along the first direction and are separated from each other. The channel layer is disposed between the first conductive pillar and the second conductive pillar. The memory structure surrounds the second conductive pillar, and the memory structure includes a resistive memory material.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 14, 2024
    Inventors: Feng-Min LEE, Erh-Kun LAI, Dai-Ying LEE, Yu-Hsuan LIN, Po-Hao TSENG, Ming-Hsiu LEE
  • Patent number: 11923008
    Abstract: A TCAM comprises a plurality of first search lines, a plurality of second search lines, a plurality of memory cell strings and one or more current sensing units. The memory cell strings comprise a plurality of memory cells. The current sensing units are coupled to the memory cell strings. In a search operation, a determination that whether any of the data stored in the memory cell strings matches a data string to be searched is made according to whether the one or more current sensing units detect current from the memory cell strings, or according to the magnitude of the current flowing out from the memory cell strings detected by the one or more current sensing units. Each memory cell includes a first transistor and a second transistor. Gates of the first and second transistors are coupled to a corresponding first search line and a corresponding second search line.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: March 5, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Po-Hao Tseng, Feng-Min Lee, Ming-Hsiu Lee
  • Patent number: 6220664
    Abstract: A base structure for a chair seat includes a base mounted to an underside of the chair seat. Two lateral walls of the base include aligned vertical slots. A first pin is slidably extended through the aligned vertical slots. One of the lateral walls includes a retaining slot with a number of vertical retaining positions. The other of the lateral walls includes a guiding slot in alignment with the retaining slot A swivel seat includes a first end pivotally mounted between the lateral walls of the base by a second pin. The swivel seat is connected to an end of a backrest to pivot therewith. An adjusting rod has a first operative end and a second end extended through a second end of the swivel seat and the lateral walls of the base. The second end of the adjusting rod is releasably engaged with one of the vertical retaining positions, thereby allowing adjustment of an inclination angle of the backrest relative to the seat.
    Type: Grant
    Filed: August 26, 1999
    Date of Patent: April 24, 2001
    Inventor: Ming-Hao Lee
  • Patent number: 6033013
    Abstract: An armrest includes a reactive force-reducing device mounted to an upper side thereof for reducing the reactive force as a result of exerting a force to the armrest. The armrest includes a base and a cover mounted on top of the base, and the reactive force-reducing device is mounted to an upper side of the cover. The base includes a compartment defined therein for receiving articles. The cover includes an end pivotally connected to a first end of the base. The other end of the base includes a first engaging member for releasably engaging with a second engaging member on a second end of the base.
    Type: Grant
    Filed: April 28, 1999
    Date of Patent: March 7, 2000
    Inventor: Ming-Hao Lee
  • Patent number: D417100
    Type: Grant
    Filed: December 14, 1998
    Date of Patent: November 30, 1999
    Inventor: Ming-Hao Lee
  • Patent number: D417106
    Type: Grant
    Filed: December 14, 1998
    Date of Patent: November 30, 1999
    Inventor: Ming-Hao Lee
  • Patent number: D431943
    Type: Grant
    Filed: December 14, 1998
    Date of Patent: October 17, 2000
    Inventor: Ming Hao Lee
  • Patent number: D1023935
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: Ya-Hao Chan, Yi-Heng Lee, Ming-Cheng Wu, Chun-Yu Chen