Abstract: An apparatus for line drawing using a plurality of pixels to display a line, including a first parameter generating module, a second parameter generating module, a storage module, a retrieving module, and a calculating module. In this case, the first parameter generating module generates a first parameter according to a slope of the line. The second parameter generating module generates a second parameter according to the distance between one of the pixels and the line in axial directions. The storage module stores an index table, which records at least a blending factor and the correlations between the first parameter, second parameter, and blending factor. Therefore, the retrieving module searches for the blending factor from the index table according to the first and second parameter. Finally, the calculating module determines the color of this pixel according to the blending factor.

Abstract: In a method for adaptive arbitration of requests for accessing a memory unit in a multi-stage pipeline engine that includes a plurality of request queues corresponding to the stages of the pipeline engine, each of the request queues is assigned to one of a high-priority group and a low-priority group in accordance with an operating state of the memory unit. The request queues in the high-priority group are then processed prior to the request queues in the low-priority group.

Abstract: An apparatus for line drawing using a plurality of pixels to display a line, including a first parameter generating module, a second parameter generating module, a storage module, a retrieving module, and a calculating module. In this case, the first parameter generating module generates a first parameter according to a slope of the line. The second parameter generating module generates a second parameter according to the distance between one of the pixels and the line in axial directions. The storage module stores an index table, which records at least a blending factor and the correlations between the first parameter, second parameter, and blending factor. Therefore, the retrieving module searches for the blending factor from the index table according to the first and second parameter. Finally, the calculating module determines the color of this pixel according to the blending factor.

Abstract: The present invention discloses an apparatus and method for cache memory connection of texture mapping, applied in a computer graphic processing system by storing image texels in cache memories. The apparatus comprises a plurality of cache memories. An array of image texels are stored in a plurality of cache memories to reduce the area occupied by cache memories of the computer graphic processing system. Besides, the apparatus and method of the present invention can be applied in the well-known mapping methods: selecting the nearest point, bilinear filtering and trilinear filtering. A plurality of multiplexers are used to reorganize the plurality of cache memories so as to increase the utilization efficiency of the apparatus of the present invention.

Abstract: A method and a computer system are provided for using a portion of a local memory of a graphics card as an extensive memory of a system memory. When the computer system is rebooted, a portion of a local memory of a graphics card is claimed as an extensive memory of the system memory, and the local memory excluding the extensive memory is claimed a new local memory by a driver of the graphics card. The driver of the graphics card reports the new local memory capacity to an operating system of the computer. Then, a new system memory capacity including the extensive memory and the original system memory is claimed by a chipset of the computer system and reported to a memory sizing command of BIOS. Finally, if a memory access request is within the address range of the extensive memory, the memory access request is transmitted to the graphics card through AGP/PCI bus.

Abstract: In a method for adaptive arbitration of requests for accessing a memory unit in a multi-stage pipeline engine that includes a plurality of request queues corresponding to the stages of the pipeline engine, each of the request queues is assigned to one of a high-priority group and a low-priority group in accordance with operating state of the memory unit. The request queues in the high-priority group are then processed prior to the request queues in the low-priority group.

Abstract: A non-stalling pipeline tag controller includes cascaded source and holding registers coupled respectively to an external input unit and a data memory module. A tag memory module includes a tag memory unit for storing tags to memory data in the data memory module, and a first comparator unit that generates a first decision signal to indicate whether the source tag in the source register matches with one of the tags in the tag memory unit. A status module includes a second comparator unit that generates a second decision signal to indicate whether the source tags stored in the source and holding registers match with one another, and a decision unit that compares the first and second decision signals and that generates a third decision signal to indicate occurrence of a cache hit or cache miss condition.