Abstract: A comparison apparatus and a speed-up method for comparator are provided. The comparison apparatus consists of a comparator and a bias modulator. The bias modulator receives input signals of the comparator to provide a set of output signals modulated according to the input signals. The set of output signals dynamically adjust body voltages of transistors in a positive feedback network of the comparator to increase a switching speed of the transistors. Therefore, an operation speed of the comparator can also be increased.

Abstract: A circuit with programmable signal bandwidth is provided. The circuit includes a first charge and discharge device, a first reset device, and a first variable capacitor device. The first reset device is coupled to the first charge and discharge device, and the first variable capacitor device is coupled to the first charge and discharge device. The first reset device is controlled by a discharge enable signal and used to provide a first discharge path. When the discharge enable signal turns off the first reset device, the first variable capacitor device generates a first total equivalent capacitor to the first charge and discharge device according to n reference signals, and n is an integer greater than 0.

Abstract: A circuit with programmable signal bandwidth is provided. The circuit includes a first charge and discharge device, a first reset device, and a first variable capacitor device. The first reset device is coupled to the first charge and discharge device, and the first variable capacitor device is coupled to the first charge and discharge device. The first reset device is controlled by a discharge enable signal and used to provide a first discharge path. When the discharge enable signal turns off the first reset device, the first variable capacitor device generates a first total equivalent capacitor to the first charge and discharge device according to n reference signals, and n is an integer greater than 0.

Abstract: A receiver with discrete-time filtering and down-conversion is provided. The receiver includes a mixer and a sampling-and-filtering device. The sampling-and-filtering device is coupled to the mixer. The mixer receives a first radio frequency signal, and then mixes the first radio frequency with a reference signal to generate a first signal. The first signal is a continuous-time signal. The sampling-and-filtering device sequentially samples, filters, and down-converts the first signal according to a clock signal to generate a second signal.

Abstract: A phase change memory device is disclosed. A first columnar electrode and a second columnar electrode are provided, both arranged horizontally. A phase change layer is interposed between the first columnar electrode and the second columnar electrode, electrically connecting both thereof, wherein the entirety of the phase change layer is disposed on a plane. A bottom electrode electrically connects the first columnar electrode. A top electrode electrically connects the second columnar electrode.