Patents by Inventor MING-HONG KAO

MING-HONG KAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230207450
    Abstract: The present disclosure provides a semiconductor structure, including a capacitor. The capacitor includes a first electrode and a second electrode respectively electrically connected to a first conductor and a second conductor; and a first dielectric layer between the first electrode and the second electrode. In some embodiments, the first dielectric layer contacts with a sidewall surface of the first conductor. The semiconductor structure further includes a second dielectric layer over and adjacent to the capacitor. A method of forming the semiconductor package is also provided.
    Type: Application
    Filed: February 17, 2023
    Publication date: June 29, 2023
    Inventors: CHIH-KUANG KAO, TA-CHIH PENG, MING-HONG KAO, HUEI-WEN YANG
  • Patent number: 11688759
    Abstract: A metal-insulator-metal (MIM) capacitor structure includes a bottom electrode, a first oxide layer adjacent the bottom electrode, and a first high-k dielectric layer over the bottom electrode and the first oxide layer. A middle electrode is over the first high-k dielectric layer and a second oxide layer is adjacent the middle electrode. A second high-k dielectric layer may be over the middle electrode and the second oxide layer, a top electrode may be over the second high-k dielectric layer.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: June 27, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiang-Ku Shen, Ming-Hong Kao, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Patent number: 11587863
    Abstract: The present disclosure provides a semiconductor structure, including a capacitor. The capacitor includes a first electrode and a second electrode respectively electrically connected to a first conductor and a second conductor; and a first dielectric layer between the first electrode and the second electrode. In some embodiments, the first dielectric layer contacts with a sidewall surface of the first conductor. The semiconductor structure further includes a second dielectric layer over and adjacent to the capacitor. A method of forming the semiconductor package is also provided.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: February 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chih-Kuang Kao, Ta-Chih Peng, Ming-Hong Kao, Huei-Wen Yang
  • Publication number: 20210328005
    Abstract: A metal-insulator-metal (MIM) capacitor structure includes a bottom electrode, a first oxide layer adjacent the bottom electrode, and a first high-k dielectric layer over the bottom electrode and the first oxide layer. A middle electrode is over the first high-k dielectric layer and a second oxide layer is adjacent the middle electrode. A second high-k dielectric layer may be over the middle electrode and the second oxide layer, a top electrode may be over the second high-k dielectric layer.
    Type: Application
    Filed: July 2, 2021
    Publication date: October 21, 2021
    Inventors: Hsiang-Ku SHEN, Ming-Hong KAO, Hui-Chi CHEN, Dian-Hau CHEN, Yen-Ming CHEN
  • Patent number: 11056556
    Abstract: A method of fabricating a metal-insulator-metal (MIM) capacitor structure includes forming a bottom electrode, forming a first oxide layer adjacent the bottom electrode, and depositing a first high-k dielectric layer over the bottom electrode and the first oxide layer. A middle electrode is then formed over the first high-k dielectric layer and a second oxide layer is formed adjacent the middle electrode. A second high-k dielectric layer may be deposited over the middle electrode and the second oxide layer and a top electrode over the second high-k dielectric layer.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: July 6, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiang-Ku Shen, Ming-Hong Kao, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20210118795
    Abstract: The present disclosure provides a semiconductor structure, including a capacitor. The capacitor includes a first electrode and a second electrode respectively electrically connected to a first conductor and a second conductor: and a first dielectric layer between the first electrode and the second electrode. In some embodiments, the first dielectric layer contacts with a sidewall surface of the first conductor. The semiconductor structure further includes a second dielectric layer over and adjacent to the capacitor. A method of forming the semiconductor package is also provided.
    Type: Application
    Filed: December 9, 2020
    Publication date: April 22, 2021
    Inventors: CHIH-KUANG KAO, TA-CHIH PENG, MING-HONG KAO, HUEI-WEN YANG
  • Patent number: 10867903
    Abstract: The present disclosure provides a semiconductor package, including at least two conductors and a first dielectric partially surrounding the at least two conductors, a capacitor substantially under the first dielectric, and a second dielectric over and lining along the first dielectric and top portions of the at least two conductors. The at least two conductors are respectively configured as an input/output (I/O) terminal of the semiconductor package. The capacitor includes a first electrode extending along a first direction and electrically connected with one of the at least two conductors, and a second electrode extending along a second direction opposite to the first direction and electrically connected to the other one of the at least two conductors. The second dielectric provides a compressive stress to the first dielectric. A method of forming the semiconductor package is also provided.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chih-Kuang Kao, Ta-Chih Peng, Ming-Hong Kao, Huei-Wen Yang
  • Publication number: 20200105863
    Abstract: A method of fabricating a metal-insulator-metal (MIM) capacitor structure includes forming a bottom electrode, forming a first oxide layer adjacent the bottom electrode, and depositing a first high-k dielectric layer over the bottom electrode and the first oxide layer. A middle electrode is then formed over the first high-k dielectric layer and a second oxide layer is formed adjacent the middle electrode. A second high-k dielectric layer may be deposited over the middle electrode and the second oxide layer and a top electrode over the second high-k dielectric layer.
    Type: Application
    Filed: June 12, 2019
    Publication date: April 2, 2020
    Inventors: Hsiang-Ku SHEN, Ming-Hong KAO, Hui-Chi CHEN, Dian-Hau CHEN, Yen-Ming CHEN
  • Publication number: 20200035596
    Abstract: The present disclosure provides a semiconductor package, including at least two conductors and a first dielectric partially surrounding the at least two conductors, a capacitor substantially under the first dielectric, and a second dielectric over and lining along the first dielectric and top portions of the at least two conductors. The at least two conductors are respectively configured as an input/output (I/O) terminal of the semiconductor package. The capacitor includes a first electrode extending along a first direction and electrically connected with one of the at least two conductors, and a second electrode extending along a second direction opposite to the first direction and electrically connected to the other one of the at least two conductors. The second dielectric provides a compressive stress to the first dielectric. A method of forming the semiconductor package is also provided.
    Type: Application
    Filed: November 9, 2018
    Publication date: January 30, 2020
    Inventors: CHIH-KUANG KAO, TA-CHIH PENG, MING-HONG KAO, HUEI-WEN YANG