Patents by Inventor Ming-Horng Tsai

Ming-Horng Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935871
    Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Hsien Chiang, Hui-Chun Chiang, Tzu-Sung Huang, Ming-Hung Tseng, Kris Lipu Chuang, Chung-Ming Weng, Tsung-Yuan Yu, Tzuan-Horng Liu
  • Patent number: 9922938
    Abstract: The present disclosure relates to a semiconductor device package which includes a carrier, an electronic component disposed on the carrier, and a package body disposed on the carrier and encapsulating the electronic component. A shield is disposed on the package body. The shield includes multiple non-magnetic conductive layers, multiple insulating layers and multiple magnetic conductive layers. At least one of the insulating layers is located between each non-magnetic conductive layer and a neighboring magnetic conductive layer.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: March 20, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Horng Tsai, Wei-Yu Chen, Chun-Chia Lee, Huan Wun Li
  • Publication number: 20170025363
    Abstract: The present disclosure relates to a semiconductor device package which includes a carrier, an electronic component disposed on the carrier, and a package body disposed on the carrier and encapsulating the electronic component. A shield is disposed on the package body. The shield includes multiple non-magnetic conductive layers, multiple insulating layers and multiple magnetic conductive layers. At least one of the insulating layers is located between each non-magnetic conductive layer and a neighboring magnetic conductive layer.
    Type: Application
    Filed: September 6, 2016
    Publication date: January 26, 2017
    Inventors: Ming-Horng Tsai, Wei-Yu Chen, Chun-Chia Lee, Huan Wun Li
  • Patent number: 9461001
    Abstract: The present disclosure relates to a semiconductor device package which includes a carrier, an electronic component, conductive elements, a package body, a shield, a magnetic insulating layer, and a patterned conductive layer. The carrier has a top surface on which the electronic component is disposed. The conductive elements are disposed on the top surface of the carrier. The package body is disposed on the top surface of the carrier and encapsulates the electronic component and a portion of each of the conductive elements. The shield is disposed on the package body and covers an exterior of the package body. The magnetic insulating layer is disposed on a top surface of the shield. The patterned conductive layer is disposed on the magnetic insulating layer. Each of the conductive elements electrically connects the patterned conductive layer to the electronic component.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: October 4, 2016
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Horng Tsai, Wei-Yu Chen, Chun-Chia Lee, Huan Wun Li
  • Publication number: 20040246040
    Abstract: A switched capacitor circuit for use in a voltage controlled oscillator (VCO) capable of minimizing clock feedthrough effect and an undesired momentary frequency drift in the VCO output frequency when the switched capacitor circuit is shut off. By gradually switching the switched capacitor circuit from an on state to an off state the clock feedthrough effect can be minimized. Several differently sized switch elements are used to selectively switch the capacitor from an internal capacitive node to ground. When switching the switched capacitor circuit to an off state, the control signals are sequenced to shut the switch elements off in order based on decreasing switch size. The smallest switch element can have a low-pass filter added to its control terminal to further decrease the clock feedthrough effect.
    Type: Application
    Filed: May 6, 2004
    Publication date: December 9, 2004
    Inventors: Chi-Ming Hsiao, Guang-Kaai Dehng, Ming-Horng Tsai, Ling-Wei Ke, En-Hsiang Yeh, Chi-Kun Chiu
  • Publication number: 20040246039
    Abstract: A switched capacitor circuit for use in a voltage controlled oscillator (VCO) capable of minimizing clock feedthrough effect and an undesired momentary frequency drift in the VCO output frequency when the switched capacitor circuit is shut off. By gradually switching the switched capacitor circuit from an on state to an off state the clock feedthrough effect can be minimized. Several differently sized switch elements are used to selectively switch the capacitor from an internal capacitive node to ground. When switching the switched capacitor circuit to an off state, the control signals are sequenced to shut the switch elements off in order based on decreasing switch size. The smallest switch element can have a low-pass filter added to its control terminal to further decrease the clock feedthrough effect.
    Type: Application
    Filed: June 3, 2003
    Publication date: December 9, 2004
    Inventors: Chi-Ming Hsiao, Guang-Kaai Dehng, Ming-Horng Tsai, Ling-Wei Ke, En-Hsiang Yeh, Chi-Kun Chiu