Patents by Inventor Ming-Hsien Yang

Ming-Hsien Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240115681
    Abstract: Provided is a pharmaceutical composition including an active pharmaceutical ingredient, a toll-like receptor (TLR) agonist, a stimulator of interferon genes (STING) agonist, and a pharmaceutically acceptable carrier. Also provided are a method for inducing immune response and a method for treating or preventing cancer or an infectious disease, including administering an effective amount of the pharmaceutical composition to a subject in need thereof.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 11, 2024
    Applicant: National Health Research Institutes
    Inventors: Tsung-Hsien Chuang, Jing-Xing Yang, Jen-Chih Tseng, Zaida Nur Imana, Ming-Hsi Huang, Guann-Yi Yu
  • Publication number: 20240105750
    Abstract: A CMOS image sensor includes PDAF pixels distributed in an array of image pixels in plan view. Each PDAF pixel includes m×m binned photodiodes, a PDAF color filter overlying the binned photodiodes and laterally surrounded by a first isolation structure, and a PDAF micro-lens overlying the PDAF color filter. A first horizontal distance between a center of the PDAF color filter and a center of the binned photodiodes varies depending on a location of the PDAF pixel in plan view in the CMOS image sensor. Additionally, the first isolation structure includes a first low-n dielectric grid, a second low-n dielectric grid underlying the first low-n dielectric grid, and a metal grid enclosed by the second low-n dielectric grid. The second low-n dielectric grid includes a filler dielectric material different from a second low-n dielectric grid material. Thus, quantum efficiency and uniformity of the CMOS image sensor are improved.
    Type: Application
    Filed: February 16, 2023
    Publication date: March 28, 2024
    Inventors: Ming-Hsien YANG, Chun-Hao Chou, Kuo-Cheng Lee
  • Patent number: 11942532
    Abstract: A method includes fabricating a semiconductor device, wherein the method includes depositing a coating layer on a first region and a second region under a loading condition such that a height of the coating layer in the first region is greater than a height of the coating layer in the second region. The method also includes applying processing gas to the coating layer to remove an upper portion of the coating layer such that a height of the coating layer in the first region is a same as a height of the coating layer in the second region.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chao-Hsuan Chen, Ming-Chia Tai, Yu-Hsien Lin, Shun-Hui Yang, Ryan Chia-Jen Chen
  • Publication number: 20240050987
    Abstract: A semiconductor device and a method are provided. The semiconductor device includes a first semiconductor component, a bonding layer and a second semiconductor component. The first semiconductor component includes a first transistor formed on a substrate and a second transistor formed on the substrate and separated from the first transistor. The bonding layer is provided on the first semiconductor component. The second semiconductor component is provided on the bonding layer and includes an acoustic transducer. The acoustic transducer is controlled by the first transistor and the second transistor to execute a photoacoustic sensing. The acoustic transducer comprises a space gap and a least a portion of the space gap is surrounded by the bonding layer.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 15, 2024
    Inventors: MING-HSIEN YANG, CHUN-HAO CHOU, KUO-CHENG LEE, SHENG KAI YEH
  • Publication number: 20240055452
    Abstract: A semiconductor image sensing structure includes a substrate, an isolation structure, an anti-reflection structure, at least one optical element and a transistor. The substrate has at least one photodiode region. The isolation structure is disposed in the substrate and surrounds the photodiode region. The anti-reflection structure covers the photodiode region. The optical element is disposed over the anti-reflection structure and corresponds to the photodiode region. The transistor is disposed under the photodiode region.
    Type: Application
    Filed: August 9, 2022
    Publication date: February 15, 2024
    Inventors: MING-HSIEN YANG, CHUN-LIANG LU, CHUN-HAO CHOU, KUO-CHENG LEE
  • Publication number: 20240021643
    Abstract: Various embodiments of the present application are directed towards image sensors including composite backside illuminated (CBSI) structures to enhance performance. In some embodiments, a first trench isolation structure extends into a backside of a substrate to a first depth and comprises a pair of first trench isolation segments. A photodetector is in the substrate, between and bordering the first trench isolation segments. A second trench isolation structure is between the first trench isolation segments and extends into the backside of the substrate to a second depth less than the first depth. The second trench isolation structure comprises a pair of second trench isolation segments. An absorption enhancement structure overlies the photodetector, between the second trench isolation segments, and is recessed into the backside of the semiconductor substrate. The absorption enhancement structure and the second trench isolation structure collectively define a CBSI structure.
    Type: Application
    Filed: July 21, 2023
    Publication date: January 18, 2024
    Inventors: Wei Chuang Wu, Dun-Nian Yaung, Feng-Chi Hung, Jen-Cheng Liu, Jhy-Jyi Sze, Keng-Yu Chou, Yen-Ting Chiang, Ming-Hsien Yang, Chun-Yuan Chen
  • Publication number: 20240006425
    Abstract: An image sensor includes a substrate having first and second surfaces opposite to each other, an image pixel area, and a black level calibration (BLC) area adjacent to the image pixel area. The BLC area includes a dark current sensing circuit including photo diodes disposed in the substrate, a first seal ring disposed over the second surface and surrounding the image pixel area in plan view, a second seal ring disposed over the second surface and surrounding the image pixel area in plan view such that the dark current sensing circuit is disposed between the first and second seal rings, an opaque cover disposed over the first surface and covering the dark current sensing circuit, the first and second seal rings, and one or more first trench isolation structures extending from the first surface to an inside the substrate and disposed between the first seal ring and the opaque cover.
    Type: Application
    Filed: March 24, 2023
    Publication date: January 4, 2024
    Inventors: Ming-Hsien YANG, Chun-Hao CHOU, Kuo-Cheng LEE, Chun-Wei CHIA, Chun-Liang LU, Wei-Chih WENG, Cheng-Hao CHIU
  • Publication number: 20230361140
    Abstract: Provided is an image sensor and a method of forming the same. The image sensor includes a first substrate having a first surface and a second surface opposite to each other; a plurality of photodetectors, disposed in the first substrate; and a plurality of color filters, disposed on the second surface of the first substrate and respectively corresponding to the plurality of photodetectors. The plurality of color filters are composed of a plurality of PIN diodes, and the plurality of PIN diodes are configured to absorb light of different wavelength ranges by applying different bias voltages.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Liang Lu, Ming-Hsien Yang, Chun-Hao Chou, Kuo-Cheng Lee
  • Patent number: 11791357
    Abstract: Various embodiments of the present application are directed towards image sensors including composite backside illuminated (CBSI) structures to enhance performance. In some embodiments, a first trench isolation structure extends into a backside of a substrate to a first depth and comprises a pair of first trench isolation segments. A photodetector is in the substrate, between and bordering the first trench isolation segments. A second trench isolation structure is between the first trench isolation segments and extends into the backside of the substrate to a second depth less than the first depth. The second trench isolation structure comprises a pair of second trench isolation segments. An absorption enhancement structure overlies the photodetector, between the second trench isolation segments, and is recessed into the backside of the semiconductor substrate. The absorption enhancement structure and the second trench isolation structure collectively define a CBSI structure.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: October 17, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei Chuang Wu, Dun-Nian Yaung, Feng-Chi Hung, Jen-Cheng Liu, Jhy-Jyi Sze, Keng-Yu Chou, Yen-Ting Chiang, Ming-Hsien Yang, Chun-Yuan Chen
  • Publication number: 20230275109
    Abstract: A semiconductor image sensing structure includes a substrate having a first region and a second region, a metal grid in the first region, and a hybrid metal shield in the second region. The hybrid metal shield includes a first metallization layer, a second metallization layer disposed over the first metallization layer, a third metallization layer disposed over the second metallization layer, and a fourth metallization layer disposed over the third metallization layer. An included angle of the second metallization layer is between approximately 40° and approximately 60°.
    Type: Application
    Filed: January 28, 2022
    Publication date: August 31, 2023
    Inventors: MING-HSIEN YANG, WEN-I HSU, KUAN-FU LU, FENG-CHI HUNG, JEN-CHENG LIU, DUN-NIAN YAUNG, CHUN-HAO CHOU, KUO-CHENG LEE
  • Publication number: 20230049255
    Abstract: A semiconductor device is provided. The device comprises first semiconductor wafer comprising first BEOL structure disposed on first side of first substrate, the first BEOL structure comprising first metallization layer disposed over the first substrate, second metallization layer disposed over the first metallization layer, first storage device disposed between the first and second metallization layers, and first transistor contacting the first storage device, and a first bonding layer disposed over the first BEOL structure.
    Type: Application
    Filed: January 25, 2022
    Publication date: February 16, 2023
    Inventors: Ming-Hsien YANG, Chun-Hao CHOU, Kuo-Cheng LEE, Chung-Liang CHENG
  • Publication number: 20220415938
    Abstract: Image sensing devices according to present disclosure include metal gate structures in a pixel device. Particularly, the metal gate structures include a ferroelectric layer and a conductive layer to form a negative capacitance device in the gate stack. As a result, the transistors in the pixel device have reduced threshold swing, improved gain and reduced threshold voltage shift. The pixel device according to the present disclosure includes a combination of metal gate and polycrystalline gate, which provides flexibility in pixel device design and improves performance.
    Type: Application
    Filed: February 11, 2022
    Publication date: December 29, 2022
    Inventors: Ming-Hsien YANG, Chun-Hao CHOU, Kuo-Cheng LEE, Chung-Liang CHENG
  • Patent number: 11536349
    Abstract: A transmission mechanism includes first and second transmission, first and second shafts, a clutch, and a one-way bearing. In the first gear, power is output through the first driving transmission and the one-way bearing; and in the second gear, the power is output through the clutch, the second driving transmission and the one-way bearing.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: December 27, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Ping Yang, Meng-Ru Wu, Ming-Hsien Yang, Peng-Yu Chen, Jui-Tang Tseng
  • Publication number: 20220277127
    Abstract: A method for wafer bonding includes receiving a layout of a bonding layer with an asymmetric pattern, determining whether an asymmetry level of the layout is within a predetermined range by a design rule checker, modifying the layout to reduce the asymmetry level of the layout if the asymmetry level is beyond the predetermined range. The method also includes outputting the layout in a computer-readable format.
    Type: Application
    Filed: November 29, 2021
    Publication date: September 1, 2022
    Inventors: Shih-Han Huang, Wen-I Hsu, Shuang-Ji Tsai, Ming-Hsien Yang, Yen-Ting Chiang, Shyh-Fann Ting, Feng-Chi Hung, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 11282802
    Abstract: A semiconductor device structure is provided, in some embodiments. The semiconductor device structure includes a semiconductor substrate having a first surface, a second surface, and sidewalls defining a recess that passes through the semiconductor substrate. The semiconductor device structure further includes an interconnect structure having one or more interconnect layers within a first dielectric structure that is disposed along the second surface. A conductive bonding structure is disposed within the recess and includes nickel. The conductive bonding structure has opposing outermost sidewalls that contact sidewalls of the interconnect structure.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: March 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hsien Yang, Ching-Chun Wang, Dun-Nian Yaung, Feng-Chi Hung, Sin-Yao Huang
  • Patent number: 11211419
    Abstract: Various embodiments of the present application are directed towards image sensors including composite backside illuminated (CBSI) structures to enhance performance. In some embodiments, a first trench isolation structure extends into a backside of a substrate to a first depth and comprises a pair of first trench isolation segments. A photodetector is in the substrate, between and bordering the first trench isolation segments. A second trench isolation structure is between the first trench isolation segments and extends into the backside of the substrate to a second depth less than the first depth. The second trench isolation structure comprises a pair of second trench isolation segments. An absorption enhancement structure overlies the photodetector, between the second trench isolation segments, and is recessed into the backside of the semiconductor substrate. The absorption enhancement structure and the second trench isolation structure collectively define a CBSI structure.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: December 28, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei Chuang Wu, Dun-Nian Yaung, Feng-Chi Hung, Jen-Cheng Liu, Jhy-Jyi Sze, Keng-Yu Chou, Yen-Ting Chiang, Ming-Hsien Yang, Chun-Yuan Chen
  • Publication number: 20210366956
    Abstract: Various embodiments of the present application are directed towards image sensors including composite backside illuminated (CBSI) structures to enhance performance. In some embodiments, a first trench isolation structure extends into a backside of a substrate to a first depth and comprises a pair of first trench isolation segments. A photodetector is in the substrate, between and bordering the first trench isolation segments. A second trench isolation structure is between the first trench isolation segments and extends into the backside of the substrate to a second depth less than the first depth. The second trench isolation structure comprises a pair of second trench isolation segments. An absorption enhancement structure overlies the photodetector, between the second trench isolation segments, and is recessed into the backside of the semiconductor substrate. The absorption enhancement structure and the second trench isolation structure collectively define a CBSI structure.
    Type: Application
    Filed: August 4, 2021
    Publication date: November 25, 2021
    Inventors: Wei Chuang Wu, Dun-Nian Yaung, Feng-Chi Hung, Jen-Cheng Liu, Jhy-Jyi Sze, Keng-Yu Chou, Yen-Ting Chiang, Ming-Hsien Yang, Chun-Yuan Chen
  • Publication number: 20210164543
    Abstract: A transmission mechanism includes first and second transmission, first and second shafts, a clutch, and a one-way bearing. In the first gear, power is output through the first driving transmission and the one-way bearing; and in the second gear, the power is output through the clutch, the second driving transmission and the one-way bearing.
    Type: Application
    Filed: February 10, 2021
    Publication date: June 3, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Ping YANG, Meng-Ru WU, Ming-Hsien YANG, Peng-Yu CHEN, Jui-Tang TSENG
  • Patent number: 10948049
    Abstract: A transmission mechanism includes first and second transmission, first and second shafts, a clutch, and a one-way bearing. In the first gear, power is output through the first driving transmission and the one-way bearing; and in the second gear, the power is output through the clutch, the second driving transmission and the one-way bearing.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: March 16, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Ping Yang, Meng-Ru Wu, Ming-Hsien Yang, Peng-Yu Chen, Jui-Tang Tseng
  • Patent number: 10604009
    Abstract: A dual-shaft gearbox mechanism includes a hollow shaft motor, first and second gear sets, first and second shafts, a clutch and a unidirectional assembly. When the dual-shaft gearbox mechanism is in a first gear, power is outputted via the first gear set and the unidirectional assembly. When the dual-shaft gearbox mechanism is in a second gear, power is outputted via the clutch and the second gear set.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: March 31, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Ping Yang, Ming-Hsien Yang, Chia Tsao, Li-Te Huang, Peng-Yu Chen