Patents by Inventor Ming-Hsuan Chang
Ming-Hsuan Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145389Abstract: A semiconductor chip includes a first intellectual property block. There are a second intellectual property block and a third intellectual property block around the first intellectual property block. There is a multiple metal layer stack over the first intellectual property block, the second intellectual property block, and the third intellectual property block. An interconnect structure is situated in the upper portion of the multiple metal layer stack. The interconnect structure is configured for connecting the first intellectual property block and the second intellectual property block. In addition, at least a part of the interconnect structure extends across and over the third intellectual property block.Type: ApplicationFiled: July 28, 2023Publication date: May 2, 2024Inventors: Li-Chiu WENG, Yew Teck TIEO, Ming-Hsuan WANG, Chia-Cheng CHEN, Wei-Yi CHANG, Jen-Hang YANG, Chien-Hsiung HSU
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Publication number: 20240120338Abstract: A semiconductor device structure is provided. The semiconductor device has a first dielectric wall between an n-type source/drain region and a p-type source/drain region to physically and electrically isolate the n-type source/drain region and the p-type source/drain region from each other. A second dielectric wall is formed between a first channel region connected to the n-type source/drain region and a second channel region connected to the p-type source/drain region. A contact is formed to physically and electrically connect the n-type source/drain region with the p-type source/drain region, wherein the contact extends over the first dielectric wall. The first electric wall has a gradually decreasing width W5 towards a tip of the dielectric wall from a top contact position between the first dielectric wall and either the n-type source/drain region or the p-type source/drain region.Type: ApplicationFiled: February 15, 2023Publication date: April 11, 2024Inventors: Ta-Chun LIN, Ming-Che CHEN, Yu-Hsuan LU, Chih-Hao CHANG
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Patent number: 11915980Abstract: Metal gate cutting techniques for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes receiving an integrated circuit (IC) device structure that includes a substrate, one or more fins disposed over the substrate, a plurality of gate structures disposed over the fins, a dielectric layer disposed between and adjacent to the gate structures, and a patterning layer disposed over the gate structures. The gate structures traverses the fins and includes first and second gate structures. The method further includes: forming an opening in the patterning layer to expose a portion of the first gate structure, a portion of the second gate structure, and a portion of the dielectric layer; and removing the exposed portion of the first gate structure, the exposed portion of the second gate structure, and the exposed portion of the dielectric layer.Type: GrantFiled: December 12, 2022Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ya-Yi Tsai, Yi-Hsuan Hsiao, Shu-Yuan Ku, Ryan Chia-Jen Chen, Ming-Ching Chang
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Patent number: 8059224Abstract: A pixel structure is provided. The pixel structure includes a scan line, a gate, a first dielectric layer, a channel layer, a source, a drain, a data line, a second dielectric layer, and a pixel electrode. The gate is electrically connected to the scan line and has a first notch. The first dielectric layer covers the scan line and the gate. The channel layer is disposed on the first dielectric layer over the gate and exposed by the first notch. The source and the drain are disposed on the channel layer. Part of the drain is located over the first notch. The data line is disposed on the first dielectric layer and electrically connected to the source. The second dielectric layer covers the source, the drain and the data line. The pixel electrode is disposed on the second dielectric layer and electrically connected to the drain.Type: GrantFiled: February 10, 2010Date of Patent: November 15, 2011Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Ming-Tsung Wang, Ming-Hsuan Chang, Zhi-Zhong Liu, Meng-Chieh Tai
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Patent number: 7929068Abstract: A pixel structure including a substrate, a scan line, a data line, a first and a second switching device, a first and a second pixel electrode, a first and a second bended pixel electrode, a first and a second connecting conductive layer, and a first and a second common line is provided. The scan line and data line demarcate a first and a second areas on the substrate, and the scan line is located between the two areas. The first and second switching devices are electrically connected to the scan line and the data line and are also electrically connected to the first and second pixel electrodes on the first and second areas respectively. The first and second bended pixel electrodes on the second and first areas are electrically connected to the first and second pixel electrodes through the first and second connecting conductive layers on the scan line respectively.Type: GrantFiled: January 16, 2008Date of Patent: April 19, 2011Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Yueh-Ping Chang, Chih-Chung Liu, Ming-Tsung Wang, Ming-Hsuan Chang
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Publication number: 20100141861Abstract: A pixel structure is provided. The pixel structure includes a scan line, a gate, a first dielectric layer, a channel layer, a source, a drain, a data line, a second dielectric layer, and a pixel electrode. The gate is electrically connected to the scan line and has a first notch. The first dielectric layer covers the scan line and the gate. The channel layer is disposed on the first dielectric layer over the gate and exposed by the first notch. The source and the drain are disposed on the channel layer. Part of the drain is located over the first notch. The data line is disposed on the first dielectric layer and electrically connected to the source. The second dielectric layer covers the source, the drain and the data line. The pixel electrode is disposed on the second dielectric layer and electrically connected to the drain.Type: ApplicationFiled: February 10, 2010Publication date: June 10, 2010Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventors: Ming-Tsung Wang, Ming-Hsuan Chang, Zhi-Zhong Liu, Meng-Chieh Tai
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Patent number: 7705927Abstract: A pixel structure including a scan line, a data line, a first sub-pixel, a coupling electrode and a second sub-pixel is provided. The first sub-pixel includes a first thin film transistor (TFT) and a first pixel electrode, and the first pixel electrode is electrically connected to the scan line and the data line via the first TFT. The coupling electrode is disposed above the data line and electrically insulated from the data line. The second sub-pixel includes a second thin film transistor and a second pixel electrode. The second pixel electrode is electrically connected to the second TFT, and the second TFT is electrically connected to the coupling electrode. When seeing an image from a slant direction, color shift of image can be solved by utilizing the pixel structure. Besides, a liquid crystal display panel having the described pixel structure is also provided.Type: GrantFiled: December 28, 2007Date of Patent: April 27, 2010Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Ming-Hsuan Chang, Chih-Chung Liu, Yueh-Ping Chang
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Patent number: 7688392Abstract: A pixel structure is provided. The pixel structure includes a scan line, a gate, a first dielectric layer, a channel layer, a source, a drain, a data line, a second dielectric layer, and a pixel electrode. The gate is electrically connected to the scan line and has a first notch. The first dielectric layer covers the scan line and the gate. The channel layer is disposed on the first dielectric layer over the gate and exposed by the first notch. The source and the drain are disposed on the channel layer. Part of the drain is located over the first notch. The data line is disposed on the first dielectric layer and electrically connected to the source. The second dielectric layer covers the source, the drain and the data line. The pixel electrode is disposed on the second dielectric layer and electrically connected to the drain.Type: GrantFiled: April 6, 2006Date of Patent: March 30, 2010Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Ming-Tsung Wang, Ming-Hsuan Chang, Zhi-Zhong Liu, Meng-Chieh Tai
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Publication number: 20080303966Abstract: A pixel structure including a substrate, a scan line, a data line, a first and a second switching device, a first and a second pixel electrode, a first and a second bended pixel electrode, a first and a second connecting conductive layer, and a first and a second common line is provided. The scan line and data line demarcate a first and a second areas on the substrate, and the scan line is located between the two areas. The first and second switching devices are electrically connected to the scan line and the data line and are also electrically connected to the first and second pixel electrodes on the first and second areas respectively. The first and second bended pixel electrodes on the second and first areas are electrically connected to the first and second pixel electrodes through the first and second connecting conductive layers on the scan line respectively.Type: ApplicationFiled: January 16, 2008Publication date: December 11, 2008Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventors: Yueh-Ping Chang, Chih-Chung Liu, Ming-Tsung Wang, Ming-Hsuan Chang
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Publication number: 20080158464Abstract: A pixel structure including a scan line, a data line, a first sub-pixel, a coupling electrode and a second sub-pixel is provided. The first sub-pixel includes a first thin film transistor (TFT) and a first pixel electrode, and the first pixel electrode is electrically connected to the scan line and the data line via the first TFT. The coupling electrode is disposed above the data line and electrically insulated from the data line. The second sub-pixel includes a second thin film transistor and a second pixel electrode. The second pixel electrode is electrically connected to the second TFT, and the second TFT is electrically connected to the coupling electrode. When seeing an image from a slant direction, color shift of image can be solved by utilizing the pixel structure. Besides, a liquid crystal display panel having the described pixel structure is also provided.Type: ApplicationFiled: December 28, 2007Publication date: July 3, 2008Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventors: Ming-Hsuan Chang, Chih-Chung Liu, Yueh-Ping Chang
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Publication number: 20070236625Abstract: A pixel structure is provided. The pixel structure includes a scan line, a gate, a first dielectric layer, a channel layer, a source, a drain, a data line, a second dielectric layer, and a pixel electrode. The gate is electrically connected to the scan line and has a first notch. The first dielectric layer covers the scan line and the gate. The channel layer is disposed on the first dielectric layer over the gate and exposed by the first notch. The source and the drain are disposed on the channel layer. Part of the drain is located over the first notch. The data line is disposed on the first dielectric layer and electrically connected to the source. The second dielectric layer covers the source, the drain and the data line. The pixel electrode is disposed on the second dielectric layer and electrically connected to the drain.Type: ApplicationFiled: April 6, 2006Publication date: October 11, 2007Inventors: Ming-Tsung Wang, Ming-Hsuan Chang, Zhi-Zhong Liu, Meng-Chieh Tai
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Patent number: 6960789Abstract: A transistor that at least has one of the following characteristics: First, the gate electrode is located outside the gate line, such that the whole transistor is located outside the gate line. Second, the projection of the semiconductor layer on the substrate is totally located inside the projection of the gate electrode on the substrate. Third, the drain cross the gate electrode, such that the projection of the cross-section is totally located inside the projection of the gate electrode. Final, the separated distance between the gate line, the gate electrode, the drain and the source is adjusted to let the variation of each of Cgd and Cds be not obviously affected by the alignment deviation.Type: GrantFiled: November 24, 2003Date of Patent: November 1, 2005Assignee: Chunghwa Picture Tubes, Ltd.Inventor: Ming-Hsuan Chang
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Publication number: 20050110048Abstract: A transistor that at least has one of the following characteristics: First, the gate electrode is located outside the gate line, such that the whole transistor is located outside the gate line. Second, the projection of the semiconductor layer on the substrate is totally located inside the projection of the gate electrode on the substrate. Third, the drain cross the gate electrode, such that the projection of the cross-section is totally located inside the projection of the gate electrode. Final, the separated distance between the gate line, the gate electrode, the drain and the source is adjusted to let the variation of each of Cgd and Cds be not obviously affected by the alignment deviation.Type: ApplicationFiled: November 24, 2003Publication date: May 26, 2005Inventor: Ming-Hsuan Chang
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Patent number: 6842215Abstract: A panel for a flat panel display device is disclosed, which includes a substrate having signal wires and terminals respectively connected to the signal wires, each terminal having first, second and third conducting layer, an insulating layer, a protection layer, contact holes connected between the first conducting layer and the third conducting layer, and contact holes connected between the second conducting layer and the third conducting layer, the insulating layer being sandwiched in between the second conducting layer and the substrate, the first conducting layer being sandwiched in between the protection layer and the insulating layer, the protection layer being sandwiched in between the first conducting layer and the third conducting layer or the second conducting layer and the third conducting layer, the first conducting layer being isolated from the second conducting layer.Type: GrantFiled: January 22, 2003Date of Patent: January 11, 2005Assignee: Chunghwa Picture Tubes Ltd.Inventors: Hung-Jen Chu, Ming-Hsuan Chang, Chien-Kuo Ho
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Patent number: 6777750Abstract: A TFT liquid crystal display device is disclosed, which includes two substrates and a liquid crystal layer provided in between the substrates, one substrate having a surface providing with a plurality of data signal lines, a plurality of scan lines, a plurality of pixel electrodes, and a plurality of functional components having source electrode, gate electrodes and drain electrodes. Moreover, the projection of one of the signal electrode and the drain electrode on the gate electrode having at least one bridging zone and one conducting zone. The width of the bridging zone in the direction in parallel to one side of the gate electrode is smaller than the width of the conducting zone in the direction in parallel to the side of the gate electrode.Type: GrantFiled: October 3, 2002Date of Patent: August 17, 2004Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Hung-Jen Chu, Ming-Hsuan Chang, Chien-Kuo Ho, Nai-Jen Hsiao
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Publication number: 20030142261Abstract: A panel for a flat panel display device is disclosed, which includes a substrate having signal wires and terminals respectively connected to the signal wires, each terminal having first, second and third conducting layer, an insulating layer, a protection layer, contact holes connected between the first conducting layer and the third conducting layer, and contact holes connected between the second conducting layer and the third conducting layer, the insulating layer being sandwiched in between the second conducting layer and the substrate, the first conducting layer being sandwiched in between the protection layer and the insulating layer, the protection layer being sandwiched in between the first conducting layer and the third conducting layer or the second conducting layer and the third conducting layer, the first conducting layer being isolated from the second conducting layer.Type: ApplicationFiled: January 22, 2003Publication date: July 31, 2003Applicant: Chunghwa Picture Tubes, Ltd.Inventors: Hung-Jen Chu, Ming-Hsuan Chang, Chien-Kuo Ho
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Publication number: 20030081165Abstract: A TFT liquid crystal display device is disclosed, which includes two substrates and a liquid crystal layer provided in between the substrates, one substrate having a surface providing with a plurality of data signal lines, a plurality of scan lines, a plurality of pixel electrodes, and a plurality of functional components having source electrode, gate electrodes and drain electrodes. Moreover, the projection of one of the signal electrode and the drain electrode on the gate electrode having at least one bridging zone and one conducting zone. The width of the bridging zone in the direction in parallel to one side of the gate electrode is smaller than the width of the conducting zone in the direction in parallel to the side of the gate electrode.Type: ApplicationFiled: October 3, 2002Publication date: May 1, 2003Applicant: Chunghwa Picture Tubes, Ltd.Inventors: Hung-Jen Chu, Ming-Hsuan Chang, Chien-Kuo Ho, Nai-Jen Hsiao
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Patent number: 5973477Abstract: A multi-purpose battery for mobile phones includes a battery casing and a charging battery unit accommodated in the battery casing. The battery unit has a positive pole connected via a contact "a" of a switching switch to positive poles of a charging contact terminal and a power supply contact terminal. The contact "a" of the switching switch further connects an illuminating element and a press switch to the charging battery unit and negative poles of the charging contact terminal and the power supply contact terminal. The switching switch has another contact "b" connected in series with a buzzer and a high-voltage generator, both of which capable of forming a loop with the charging battery unit when the press switch is pressed. The high-voltage generator is connected to an electric guide rod controllable by a push switch to extend from or retract into the battery casing. All of the above-mentioned components are embedded below an outer planar surface of the battery casing to facilitate operation.Type: GrantFiled: December 16, 1998Date of Patent: October 26, 1999Assignee: Creation Intelligence Technology Co., Ltd.Inventor: Ming-Hsuan Chang
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Patent number: RE42283Abstract: A TFT liquid crystal display device is disclosed, which includes two substrates and a liquid crystal layer provided in between the substrates, one substrate having a surface providing with a plurality of data signal lines, a plurality of scan lines, a plurality of pixel electrodes, and a plurality of functional components having source electrode, gate electrodes and drain electrodes. Moreover, the projection of one of the signal electrode and the drain electrode on the gate electrode having at least one bridging zone and one conducting zone. The width of the bridging zone in the direction in parallel to one side of the gate electrode is smaller than the width of the conducting zone in the direction in parallel to the side of the gate electrode.Type: GrantFiled: January 3, 2006Date of Patent: April 12, 2011Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Hung-Jen Chu, Ming-Hsuan Chang, Chien-Kuo Ho, Nai-Jen Hsiao