Patents by Inventor Ming hui Far

Ming hui Far has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dual layer pattern formation method for dual damascene interconnect
    Patent number: 6465157
    Abstract: A new method of forming dual damascene interconnects has been achieved. A semiconductor substrate is provided. A dielectric layer is provided overlying the semiconductor substrate. A first photoresist layer is deposited overlying the dielectric layer. The first photoresist layer is exposed, but not developed, to define patterns where via trenches are planned. A second photoresist layer is deposited overlying the first photoresist layer. The second photoresist layer is exposed to define patterns where interconnect trenches are planned. The second photoresist layer and the first photoresist layer are developed to complete the via trench pattern of the first photoresist layer and the interconnect trench pattern of the second photoresist layer. The dielectric layer is etched through where defined by the via trench pattern of the first photoresist layer.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: October 15, 2002
    Assignee: Chartered Semiconductor Manufacturing Ltd
    Inventors: Jianxun Li, Mei Sheng Zhou, Subhash Gupta, Ming hui Far