Patents by Inventor Ming-I Wang

Ming-I Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250126904
    Abstract: A metal grid of a pixel array may be patterned with different sized openings over photodiodes. As a result, a uniform pixel array of photodiodes with different sensitivities may be formed. For example, the pixel array may include low-sensitivity photodiodes (LSPDs), mid-sensitivity photodiodes (MSPDs), and high-sensitivity photodiodes (HSPDs). The LSPDs, MSPDs, and HSPDs have different capture rates. Therefore, a higher dynamic range is achieved by combining signals from LSPDs, MSPDs, and HSPDs. For example, the pixel array may achieve a dynamic range of approximately 140 decibels or higher due to its increased capacity. Additionally, the pixel array exhibits better dark performance as compared to a pixel array with a combination of large photodiodes (LPDs) and small photodiodes (SPDs). Because each photodiode in the pixel array is approximately a same size, photodiode leakage is reduced as compared with irregular pixel arrays including a combination of LPDs and SPDs.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 17, 2025
    Inventors: Chih-Ping CHANG, Ming-I WANG, Shyh-Fann TING
  • Publication number: 20240355865
    Abstract: An integrated chip including a semiconductor substrate. The semiconductor substrate includes a first region having a first doping type, a second region having a second doping type, different than the first doping type, and a third region having the second doping type. A photodetector is in the semiconductor substrate. The photodetector is formed, at least in part, by the first region and the second region. A first capacitor electrode is over the third region of the semiconductor substrate. The first capacitor electrode includes a semiconductor. A first insulator layer is between the first capacitor electrode and the third region. A capacitor is along the semiconductor substrate. The capacitor is formed, at least in part, by the first capacitor electrode, the third region, and the first insulator layer.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 24, 2024
    Inventors: Chih-Ping Chang, Ming-I Wang, Shyh-Fann Ting
  • Patent number: 9783408
    Abstract: A structure of micro-electro-mechanical systems (MEMS) electroacoustic transducer is disclosed. The MEMS electroacoustic transducer includes a substrate having a MEMS device region, a diaphragm having openings and disposed in the MEMS device region, a silicon material layer disposed on the diaphragm and sealing the diaphragm, and a conductive pattern disposed beneath the diaphragm in the MEMS device region. Preferably, a first cavity is also formed between the diaphragm and the substrate.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: October 10, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Bang-Chiang Lan, Ming-I Wang, Li-Hsun Ho, Hui-Min Wu, Min Chen, Chien-Hsin Huang
  • Patent number: 9150407
    Abstract: A method for fabricating a microelectromechanical system (MEMS) device of the present invention includes the following steps: providing a substrate, comprising a circuit region and a MEMS region separated from each other; forming an interconnection structure on the substrate in the circuit region, and simultaneously forming a plurality of dielectric layers and a first electrode on the substrate in the MEMS region, wherein the first electrode comprises at least two metal layers formed in the dielectric layers and a protection ring formed in the dielectric layers and connecting two adjacent metal layers, so as to define an enclosed space between the two adjacent metal layers; forming a second electrode on the first electrode; and removing the dielectric layers outside the enclosed space in the MEMS region to form a cavity between the electrodes.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: October 6, 2015
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Tzung-Han Tan, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang, Meng-Jia Lin
  • Publication number: 20140291787
    Abstract: A structure of micro-electro-mechanical systems (MEMS) electroacoustic transducer is disclosed. The MEMS electroacoustic transducer includes a substrate having a MEMS device region, a diaphragm having openings and disposed in the MEMS device region, a silicon material layer disposed on the diaphragm and sealing the diaphragm, and a conductive pattern disposed beneath the diaphragm in the MEMS device region. Preferably, a first cavity is also formed between the diaphragm and the substrate.
    Type: Application
    Filed: June 18, 2014
    Publication date: October 2, 2014
    Inventors: Bang-Chiang Lan, Ming-I Wang, Li-Hsun Ho, Hui-Min Wu, Min Chen, Chien-Hsin Huang
  • Patent number: 8796805
    Abstract: A method includes forming an opening extending from a back surface of a semiconductor substrate to a metal pad on a front side of the semiconductor substrate, and forming a first conductive layer including a first portion overlapping active image sensors in the semiconductor substrate, a second portion overlapping black reference image sensors in the semiconductor substrate, and a third portion in the opening to contact the metal pad. A second conductive layer is formed over and contacting the first conductive layer. A first patterning step is performed to remove the first and the second portions of the second conductive layer, wherein the first conductive layer is used as an etch stop layer. A second patterning step is performed to remove a portion of the first portion of the first conductive layer. The second and the third portions of the first conductive layer remain after the second patterning step.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: August 5, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shyh-Fann Ting, Jiech-Fun Lu, Ming-I Wang, Yeur-Luen Tu, Ching-Chun Wang
  • Patent number: 8798291
    Abstract: A structure of a micro-electro-mechanical systems (MEMS) electroacoustic transducer includes a substrate, a diaphragm, a silicon material layer, and a conductive pattern. The substrate includes an MEMS device region. The diaphragm has openings, and is disposed in the MEMS device region. A first cavity is formed between the diaphragm and the substrate. The silicon material layer is disposed on the diaphragm and seals the diaphragm. The conductive pattern is disposed beneath the diaphragm in the MEMS device region.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: August 5, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Bang-Chiang Lan, Ming-I Wang, Li-Hsun Ho, Hui-Min Wu, Min Chen, Chien-Hsin Huang
  • Patent number: 8710601
    Abstract: A micro electro mechanical system (MEMS) structure is disclosed. The MEMS structure includes a backplate electrode and a 3D diaphragm electrode. The 3D diaphragm electrode has a composite structure so that a dielectric is disposed between two metal layers. The 3D diaphragm electrode is adjacent to the backplate electrode to form a variable capacitor together.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: April 29, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Hsin Huang, Bang-Chiang Lan, Ming-I Wang, Hui-Min Wu, Tzung-I Su, Chao-An Su, Tzung-Han Tan, Min Chen, Meng-Jia Lin
  • Publication number: 20140061842
    Abstract: A method includes forming an opening extending from a back surface of a semiconductor substrate to a metal pad on a front side of the semiconductor substrate, and forming a first conductive layer including a first portion overlapping active image sensors in the semiconductor substrate, a second portion overlapping black reference image sensors in the semiconductor substrate, and a third portion in the opening to contact the metal pad. A second conductive layer is formed over and contacting the first conductive layer. A first patterning step is performed to remove the first and the second portions of the second conductive layer, wherein the first conductive layer is used as an etch stop layer. A second patterning step is performed to remove a portion of the first portion of the first conductive layer. The second and the third portions of the first conductive layer remain after the second patterning step.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shyh-Fann Ting, Jiech-Fun Lu, Ming-I Wang, Yeur-Luen Tu, Ching-Chun Wang
  • Patent number: 8642986
    Abstract: An integrated circuit (IC) having a microelectromechanical system (MEMS) device buried therein is provided. The integrated circuit includes a substrate, a metal-oxide semiconductor (MOS) device, a metal interconnect, and the MEMS device. The substrate has a logic circuit region and a MEMS region. The MOS device is located on the logic circuit region of the substrate. The metal interconnect, formed by a plurality of levels of wires and a plurality of vias, is located above the substrate to connect the MOS device. The MEMS device is located on the MEMS region, and includes a sandwich membrane located between any two neighboring levels of wires in the metal interconnect and connected to the metal interconnect.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: February 4, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Tzung-Han Tan, Bang-Chiang Lan, Ming-I Wang, Tzung-I Su, Chien-Hsin Huang, Hui-Min Wu, Chao-An Su, Min Chen, Meng-Jia Lin
  • Patent number: 8587078
    Abstract: A fabricating method of integrated circuit is provided. During the fabricating process of an interconnecting structure of the integrated circuit, a micro electromechanical system (MENS) diaphragm is formed between two adjacent dielectric layers of the interconnecting structure. The method of forming the MENS diaphragm includes the following steps. Firstly, a plurality of first openings is formed within any dielectric layer to expose corresponding conductive materials of the interconnecting structure. Secondly, a bottom insulating layer is formed on the dielectric layer and filling into the first openings. Third, portions of the bottom insulating layer located in the first openings are removed to form at least a first trench for exposing the corresponding conductive materials. Then, a first electrode layer and a top insulating layer are sequentially formed on the bottom insulating layer, and the first electrode layer filled into the first trench and is electrically connected to the conductive materials.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: November 19, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Hsin Huang, Li-Che Chen, Ming-I Wang, Bang-Chiang Lan, Tzung-Han Tan, Hui-Min Wu, Tzung-I Su
  • Publication number: 20130302933
    Abstract: A microelectromechanical system (MEMS) device and a method for fabricating the same are described. The method of the present invention includes the following steps. A substrate is provided, including a circuit region and a MEMS region separated from each other. An interconnection structure is formed on the substrate in the circuit region, and simultaneously a plurality of dielectric layers and a first electrode are formed on the substrate in the MEMS region. The first electrode includes at least two metal layers and a protection ring. The metal layers and the protection ring are formed in the dielectric layers. The protection ring connects two adjacent metal layers, so as to define an enclosed space between the two adjacent metal layers. A second electrode is formed on the first electrode. The dielectric layers outside the enclosed space in the MEMS region are removed to form a cavity between the electrodes.
    Type: Application
    Filed: July 18, 2013
    Publication date: November 14, 2013
    Inventors: Tzung-Han TAN, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang, Meng-Jia Lin
  • Patent number: 8558336
    Abstract: A semiconductor photodetector structure is provided. The structure includes a substrate, a photodetecting element and a semiconductor layer disposed on the photodetecting element. The substrate includes a first semiconductor material and includes a deep trench. The surface of the deep trench includes a first type dopant. The photodetecting element is disposed in the deep trench. The photodetecting element includes a second semiconductor material. The semiconductor layer includes a second type dopant.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: October 15, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Tzung-I Su, Bang-Chiang Lan, Chao-An Su, Hui-Min Wu, Ming-I Wang, Chien-Hsin Huang, Tzung-Han Tan, Min Chen, Meng-Jia Lin, Wen-Yu Su
  • Patent number: 8525354
    Abstract: A bond pad structure comprises an interconnection structure and an isolation layer. The dielectric layer has an opening and a metal pad. The isolation layer is disposed on the interconnection structure and extends into the opening until it is in contact with the metal pad, whereby the sidewalls of the opening is blanketed by the isolation layer, and a portion of the metal pad is exposed from the opening.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: September 3, 2013
    Assignee: United Microelectronics Corporation
    Inventors: Hui-Min Wu, Ming-I Wang, Kuan-Yu Wang, Kun-Che Hsieh, Chien-Hsin Huang
  • Patent number: 8525389
    Abstract: A microelectromechanical system (MEMS) device and a method for fabricating the same are described. The MEMS device includes a first electrode and a second electrode. The first electrode is disposed on a substrate, and includes at least two metal layers, a first protection ring and a dielectric layer. The first protection ring connects two adjacent metal layers, so as to define an enclosed space between two adjacent metal layers. The dielectric layer is disposed in the enclosed space and connects two adjacent metal layers. The second electrode is disposed on the first electrode, wherein a cavity is formed between the first electrode and the second electrode.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: September 3, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Tzung-Han Tan, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang, Meng-Jia Lin
  • Patent number: 8519500
    Abstract: An image sensor with at least one correcting lens and a method for fabricating the same are described. The image sensor includes a substrate with an array of microlenses thereon and at least one correcting lens disposed over the substrate covering the microlens array. In the fabricating method, a substrate having formed with a microlens array thereon is provided, and then at least one correcting lens is disposed over the substrate covering the microlens array. The at least one correcting lens can, in use of the image sensor, shift the incident direction of light to a microlens in edge parts of the array of microlenses toward the normal line direction of the image sensor.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: August 27, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Tsung Lin, Hung-Chao Kao, Ming-I Wang, Kuo-Yuh Yang
  • Patent number: 8502382
    Abstract: A protection structure of a pad is provided. The pad is disposed in a dielectric layer on a semiconductor substrate and the pad includes a connection region and a peripheral region which encompasses the connection region. The protection structure includes at least a barrier, an insulation layer and a mask layer. The barrier is disposed in the dielectric layer in the peripheral region. The insulation layer is disposed on the dielectric layer. The mask layer is disposed on the dielectric layer and covers the insulation layer and the mask layer includes an opening to expose the connection region of the pad.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: August 6, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Bang-Chiang Lan, Ming-I Wang, Hui-Min Wu, Min Chen, Chien-Hsin Huang, Tzung-I Su, Chao-An Su, Tzung-Han Tan, Li-Che Chen, Meng-Jia Lin
  • Patent number: 8493661
    Abstract: The present disclosure provides a contiguous microlens array, which consists of a plurality of touching microlenses, wherein the adjacent microlenses are connected to each other to form a contiguous microlens array and curvatures of every angle cross section of each microlens are the same. The shape of the curved surface of a microlens in the microlens array is selectively adjusted according to its position in the array and the incident angle of light incident thereto.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: July 23, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Tsung Lin, Hsin-Ping Wu, Hung-Chao Kao, Ming-I Wang
  • Patent number: 8460960
    Abstract: A method for fabricating integrated circuit is provided. First, a first interconnect structure including a plurality of first dielectric layers and a plurality of first conductive patterns stacked therewith alternately is formed on a MEMS region of a conductive substrate. Next, an interlayer is formed on the first interconnect structure and covering the first conductive patterns. Next, a poly silicon mask layer corresponding to the first conductive patterns is formed on the interlayer and exposing a portion of the media layer. Next, the portion of the interlayer exposed by the poly silicon mask layer and a portion of the first dielectric layer corresponding thereto are removed to form a plurality of openings. Then, a portion of the conductive substrate in the MEMS region is removed.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: June 11, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Meng-Jia Lin, Bang-Chiang Lan, Ming-I Wang, Chien-Hsin Huang
  • Publication number: 20130093104
    Abstract: A bond pad structure comprises an interconnection structure and an isolation layer. The dielectric layer has an opening and a metal pad. The isolation layer is disposed on the interconnection structure and extends into the opening until it is in contact with the metal pad, whereby the sidewalls of the opening is blanketed by the isolation layer, and a portion of the metal pad is exposed from the opening.
    Type: Application
    Filed: October 13, 2011
    Publication date: April 18, 2013
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Hui-Min WU, Ming-I Wang, Kuan-Yu Wang, Kun-Che Hsieh, Chien-Hsin Huang