Patents by Inventor Ming-Ji Chiang

Ming-Ji Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088119
    Abstract: Provided are a package structure and a method of forming the same. The method includes providing a first package having a plurality of first dies and a plurality of second dies therein; performing a first sawing process to cut the first package into a plurality of second packages, wherein one of the plurality of second packages comprises three first dies and one second die; and performing a second sawing process to remove the second die of the one of the plurality of second packages, so that a cut second package is formed into a polygonal structure with the number of nodes greater than or equal to 5.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Hung Lin, Hui-Min Huang, Chang-Jung Hsueh, Wan-Yu Chiang, Ming-Da Cheng, Mirng-Ji Lii
  • Patent number: 11923392
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. A gate structure is disposed along a front-side of the substrate. A back-side of the substrate includes one or more first angled surfaces defining a central diffuser disposed over the image sensing element. The back-side of the substrate further includes second angled surfaces defining a plurality of peripheral diffusers laterally surrounding the central diffuser. The plurality of peripheral diffusers are a smaller size than the central diffuser.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Jen-Cheng Liu, Kazuaki Hashimoto, Ming-En Chen, Shyh-Fann Ting, Shuang-Ji Tsai, Wei-Chieh Chiang
  • Patent number: 6934661
    Abstract: A method for detecting wafer flat shift, and an apparatus (500) having two sensors (506a) and (506b) in a power supply circuit (600) for wafer fabrication equipment, the sensors (506a) and (506b) detecting a shift in wafer flat position from a desired position and shutting off the wafer fabrication equipment.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: August 23, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jean-Hua Yuen, Po-Ming Chen, Ming-Ji Chiang, Ji-Shen Yang
  • Publication number: 20050140977
    Abstract: A method for detecting wafer flat shift, and an apparatus (500) having two sensors (506a) and (506b) in a power supply circuit (600) for wafer fabrication equipment, the sensors (506a) and (506b) detecting a shift in wafer flat position from a desired position and shutting off the wafer fabrication equipment.
    Type: Application
    Filed: December 16, 2003
    Publication date: June 30, 2005
    Inventors: Jean-Hua Yuen, Po-Ming Chen, Ming-Ji Chiang, Ji-Shen Yang