Patents by Inventor Ming-Ji Tsai

Ming-Ji Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967579
    Abstract: A method for forming a package structure is provided. The method includes etching a top surface of a substrate to form a cavity. The substrate includes thermal vias directly under a bottom surface of the cavity. The method also includes forming at least one first electronic device in the cavity of the substrate. The first electronic device is thermally coupled to the thermal vias. The method further includes forming an encapsulating material in the cavity, so that the encapsulating material extends along sidewalls of the first electronic device and covers a surface of the first electronic device opposite the bottom surface of the cavity. In Addition, the method includes forming an insulating layer having an RDL structure over the encapsulating material. The RDL structure is electrically connected to the first electronic device.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Po-Hao Tsai, Ming-Da Cheng, Mirng-Ji Lii
  • Publication number: 20240120735
    Abstract: An electrostatic discharge (ESD) circuit includes a first ESD detection circuit, a first discharging circuit and a first ESD assist circuit. The first ESD detection circuit is coupled between a first node having a first voltage and a second node having a second voltage. The first discharging circuit includes a first transistor. The first transistor has a first gate, a first drain, a first source and a first body terminal. The first gate is coupled to the first ESD detection circuit by a third node. The first drain is coupled to the first node. The first source and the first body terminal are coupled together at the second node. The first ESD assist circuit is coupled between the second and third node, and configured to clamp a third voltage of the third node at the second voltage during an ESD event at the first or second node.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Chia-Lin HSU, Ming-Fu TSAI, Yu-Ti SU, Kuo-Ji CHEN
  • Patent number: 11923392
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. A gate structure is disposed along a front-side of the substrate. A back-side of the substrate includes one or more first angled surfaces defining a central diffuser disposed over the image sensing element. The back-side of the substrate further includes second angled surfaces defining a plurality of peripheral diffusers laterally surrounding the central diffuser. The plurality of peripheral diffusers are a smaller size than the central diffuser.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Jen-Cheng Liu, Kazuaki Hashimoto, Ming-En Chen, Shyh-Fann Ting, Shuang-Ji Tsai, Wei-Chieh Chiang
  • Patent number: 8466478
    Abstract: In one aspect of the invention, a light emitting device includes an epi layer having multiple layers of semiconductors formed on a substrate, a first electrode and a second electrode having opposite polarities with each other, and electrically coupled to corresponding semiconductor layers, respectively, of the epi layer, and a rod structure formed on the epi layer. The rod structure includes a plurality of rods distanced from each other.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: June 18, 2013
    Assignee: Chi Mei Lighting Technology Corporation
    Inventors: Meng Hsin Li, Kuo Hui Yu, Tsung-Hung Lu, Ming-Ji Tsai, Chang Hsin Chu
  • Publication number: 20120056152
    Abstract: In one aspect of the invention, a light emitting device includes an epi layer having multiple layers of semiconductors formed on a substrate, a first electrode and a second electrode having opposite polarities with each other, and electrically coupled to corresponding semiconductor layers, respectively, of the epi layer, and a rod structure formed on the epi layer. The rod structure includes a plurality of rods distanced from each other.
    Type: Application
    Filed: September 7, 2010
    Publication date: March 8, 2012
    Applicant: CHI MEI LIGHTING TECHNOLOGY CORPORATION
    Inventors: Meng Hsin Li, Kuo Hui Yu, Tsung-Hung Lu, Ming-Ji Tsai, Chang Hsin Chu