Abstract: systems and methods for data processing particularly related local iteration randomization in a data decoding circuit.

Abstract: Aspects of the disclosure pertain to a read channel system and method for providing sector prioritization for promoting improved sector processing performance. The system and method, during processing of sectors of data, prioritize each of the sectors for further processing based upon: a global iteration index of each sector, trapping set characteristics of each sector and processing latency of each sector.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a read circuit and a combining circuit. The read circuit is operable to provide a first instance of a user data set, a second instance of the user data set, and a third instance of the user data set. The combining circuit is operable to: combine at least a first segment of the first instance of the user data set with a first segment of the second instance of the user data set to yield a first combined data segment; provide a second combined data set that includes a combination of one or more second segments from the second instance of the user data set and the third instance of the user data set; and provide an aggregate data set including at least the first combined data set and the second combined data set. The second combined data set does not incorporate a second segment of the first instance of the user data set.

Abstract: Methods and systems for estimating MRA for a hard disk drive are described. The methods and systems described herein provide for real time estimating and correcting magneto-resistive head asymmetry (MRA) in a hard disk drive using analog-to-digital convertor (ADC) samples or counts. Generally, ADC outputs may be obtained by injecting MRA at known values, where an estimated MRA may be derived in real time by applying an equation using particular ADC output values. Once an estimated MRA is obtained, MRA correction may be performed when the estimated MRA is larger than a threshold value, such as by adjusting a channel MRA compensation coefficient.

Abstract: The present invention includes generating a tie-breaking metric via a comparative tie-breaking metric training process, monitoring an output of a channel detector in order to identify a tie condition between a first log-likelihood ratio (LLR) value and a second LLR value of a symbol, and upon identifying a tie condition between the first LLR value and the second LLR value of the symbol, applying the generated tie-breaking metric to the symbol in order to assign a hard decision to the symbol.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes an inter-track interference determination circuit operable to calculate an inter-track interference from a previous track data set based at least in part on the previous track data set and a current track data set. The previous track data set includes a gap. A portion of the data in the previous track data set corresponds to a previous track on a storage medium, and the data in the previous track data set corresponding to the gap corresponds to a track preceding a previous track.

Abstract: The present inventions are related to systems and methods for an LDPC decoder with dynamic Tanner graph modification, and in particular, to a non-erasure channel LDPC decoder that implements a probabilistic approach to Tanner graph modification.

Abstract: Embodiments of the inventions are related to systems and methods for data processing, and more particularly to systems and methods for mitigating trapping sets in a data processing system.

Abstract: The present inventions are related to apparatuses and methods for detecting and classifying media defects. For example, an apparatus for classifying a media defect is disclosed including a DFT circuit operable to yield real and imaginary components of a signal derived from data read from a storage medium, a calculation circuit operable to calculate an amplitude and a phase of the signal based on the real and imaginary components, and a classifier operable to detect the media defect based on the amplitude and to classify the media defect based on the phase.

Abstract: The present inventions are related to systems and methods for calculating data quality metrics for an LDPC decoder, and particularly for calculating a fractional unsatisfied check quality metric.

Abstract: Described embodiments provide enhanced read accuracy of a multi-level cell (MLC) flash memory. A read request for desired cells is received by a media controller of the memory. The media controller sets m thresholds to initial values, each threshold corresponding to a cell voltage level of the memory, and measures the cell voltage level of a given cell. For each of the desired cells of the memory, the media controller iteratively, until the measured cell voltage level converges on one of the thresholds, compares the measured cell voltage level to the thresholds. If the measured cell voltage level does not converge on one of the thresholds, the media controller updates the thresholds, remeasures the cell voltage level and compares the remeasured cell voltage level to the updated thresholds. Once the measured cell voltage level converges on a threshold, the media controller determines a binary level of the cell.

Abstract: A device includes a disk drive assembly configured to store information using a platter comprising a magnetic material surface and a magnetic head disposed above the magnetic material surface. The magnetic head is configured to move across tracks formed on the platter to write information to the magnetic material surface and read information from the magnetic material surface. The device also includes a controller operatively coupled with the disk drive assembly. The controller is configured to dynamically adjust the height of the magnetic head above the magnetic material surface at each of the tracks by determining a harmonic ratio for a particular track and comparing the harmonic ratio to a reference harmonic ratio for the track. For example, the controller calculates a difference between the harmonic ratio and the reference harmonic ratio.

Abstract: A device includes non-volatile memory and a controller. The controller receives a write request including data and a logical address associated with a file. The controller stores the data at a data storage segment having a physical address and associates the physical address with the logical address and a file identifier for the file. The controller receives a second write request including data and the logical address associated with the file. The controller stores the data at a second data storage segment having a second physical address and associates the second physical address with the logical address and the file identifier. When a file delete request for the file is received, the controller identifies the first physical address and the second physical address using the file identifier and erases the information stored at the first data storage segment and the second data storage segment based upon the file identification.

Abstract: A method and system for eliminating/suppressing long transition runs over a communications channel is disclosed. The method may include providing modulation coding based on a multi-level finite state machine (ML-FSM) having a periodic structure, the periodic structure being defined by a predetermined number of time frames. The ML-FSM may include a plurality of penalty-free edges for connecting nodes in one time frame to nodes at the same level in a subsequent time frame and a plurality of penalty edges for connecting nodes in one time frame to nodes at an upper level in the subsequent time frame. The method may further include utilizing the ML-FSM based modulation coding to facilitate data transmission over the communications channel.

Abstract: A probabilistic approach of symbol error estimation is disclosed. The probabilistic approach of symbol error estimation reflects the number of symbol errors more precisely than the number of unsatisfied checks. The more precise quality metric calculated in accordance with the present disclosure allows a codec system to achieve a better overall performance. In addition, many other features that previously depend on the number of unsatisfied checks as the sector quality metric may also benefit by adopting the more precise quality metric.

Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for manipulating soft data in a data processing system.

Abstract: Various embodiments of the present invention provide systems and methods for media defect detection.

Abstract: Various approaches, methods, systems, circuits and devices for channel bit density estimation.

Abstract: The present invention is related to systems and methods for iterative data processing scheduling.

Abstract: The present invention is related to systems and methods for defect scanning.