Patents by Inventor Ming-Jun Chiang

Ming-Jun Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128219
    Abstract: A semiconductor die including mechanical-stress-resistant bump structures is provided. The semiconductor die includes dielectric material layers embedding metal interconnect structures, a connection pad-and-via structure, and a bump structure including a bump via portion and a bonding bump portion. The entirety of a bottom surface of the bump via portion is located within an area of a horizontal top surface of a pad portion of the connection pad-and-via structure.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 18, 2024
    Inventors: Hui-Min Huang, Wei-Hung Lin, Kai Jun Zhan, Chang-Jung Hsueh, Wan-Yu Chiang, Ming-Da Cheng
  • Patent number: 7561585
    Abstract: The speed of the network address translation translated with software is generally slower than the speed of transmitting packet in the network, so that the data stored in memory is affected. In this invention, the network address translation is translated by hardware, and a plurality of comparing engines is employed to accelerate the translating speed. Therefore, even in the worst case scenario, the time needed for translating the network address is shorter than the time needed for storing the packet into memory, so that the operation of the network address translation is assured not to affect the data transmission in the network.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: July 14, 2009
    Assignee: Nuvoton Technology Corporation
    Inventors: Ming-Jun Chiang, Chih-Chieh Chuang, Chun-Yu Chen, Chun-Nan Li, Ishemel Chang
  • Publication number: 20040081150
    Abstract: The speed of the network address translation translated with software is generally slower than the speed of transmitting packet in the network, so that the data stored in memory is affected. In this invention, the network address translation is translated by hardware, and a plurality of comparing engines is employed to accelerate the translating speed. Therefore, even in the worst case scenario, the time needed for translating the network address is shorter than the time needed for storing the packet into memory, so that the operation of the network address translation is assured not to affect the data transmission in the network.
    Type: Application
    Filed: March 31, 2003
    Publication date: April 29, 2004
    Inventors: Ming-Jun Chiang, Chih-Chieh Chuang, Chun-Yu Chen, Chun-Nan Li, Ishemel Chang