Abstract: A semiconductor structure includes a gate, an active layer, a gate insulator layer, a source, and a drain. The active layer has a source region, a drain region, and a channel region. The semiconductor structure satisfies at least one of the following conditions: (1) a material of the active layer includes a-Si, and a first thickness and a second thickness of the active layer respectively in the source region and the drain region are respectively greater than a third thickness of the active layer in the channel region; (2) the gate insulator layer includes a first gate insulator layer, a third gate insulator layer, and a second gate insulator layer located between the first and third gate insulator layers. A material of the first gate insulator layer is identical to a material of the third gate insulator layer but different from a material of the second gate insulator layer.

Abstract: A thin film transistor structure includes a gate electrode, a gate insulation layer, a first amorphous silicon layer, a source/drain electrode, and a second amorphous silicon layer. The gate insulation layer is located on the gate electrode. The first amorphous silicon layer is located on the gate insulation layer. The source/drain electrode is located on the first amorphous silicon layer. The second amorphous silicon layer is located in the gate insulation layer.

Abstract: An electrophoretic display device includes a backplane structure, a buffer layer, a spacer wall, a display medium, an upper substrate and an upper electrode. The backplane structure includes a lower substrate, a transistor formed on the lower substrate, and a lower electrode electrically connected to the transistor. The buffer layer is disposed on the backplane structure. The spacer wall is disposed on the buffer layer and forms a closed pattern. The display medium is disposed in the closed pattern. The display medium includes an electrophoretic medium and a plurality of electrophoretic particles dispersed in the electrophoretic medium. The upper substrate is disposed on the spacer wall and the display medium. The upper electrode is disposed between the upper substrate and the spacer wall.

Abstract: A clock generating device includes a divisor register, a reference clock generator, a first counter, a second counter, and a delay regulator circuit. The divisor register provides a divisor. The reference clock generator outputs a reference clock signal. The first counter counts a first number of cycles of the reference clock signal and generates a first count. The first counter outputs a first clock signal according to the first count and the divisor. The second counter counts a second number of cycles of the first clock signal and generates a second count. The second counter outputs a second clock signal according to the second count and a coefficient. The delay regulator circuit determines whether to control the first counter to delay outputting the first clock signal according to the first clock signal.

Abstract: The present invention relates to a scoring method for predicting the survival of a de novo AML patient based on the expression level of microRNAs mir-9, mir-155 and mir-203 in the patient. Patients with higher scores are associated with shorter overall survival. This scoring method is simple, powerful, and widely applicable for risk stratification of AML patients.

Abstract: The present invention provides a device for stimulating neural regeneration and/or neurite outgrowth and a fabrication method thereof. A photovoltaic component having a substrate, a first conductive layer, an active layer and a second conducting stacked in sequence is formed. The photovoltaic component is encapsulated by an encapsulant with a portion of the first conductive layer and the second conductive layer exposed from the encapsulant. The device is configured to be rolled to form a guiding tube having two open ends and to be placed at a damaged portion of a nerve. When the device is illuminated by light, a photovoltage exists between the first conductive layer and the second conductive layer for producing an electric current, so as to stimulate neural regeneration and repair the damaged portion of a nerve.

Abstract: The present invention provides a device for stimulating neural regeneration and/or neurite outgrowth and a fabrication method thereof. A photovoltaic component having a substrate, a first conductive layer, an active layer and a second conducting stacked in sequence is formed. The photovoltaic component is encapsulated by an encapsulant with a portion of the first conductive layer and the second conductive layer exposed from the encapsulant. The device is configured to be rolled to form a guiding tube having two open ends and to be placed at a damaged portion of a nerve. When the device is illuminated by light, a photovoltage exists between the first conductive layer and the second conductive layer for producing an electric current, so as to stimulate neural regeneration and repair the damaged portion of a nerve.

Abstract: Disclosed is a manufacturing method for an organic optoelectronic thin film comprising the steps of providing a substrate and a first electrode; forming a semiconductor layer on the substrate, wherein the semiconductor layer includes polyethylene glycol (PEG); forming a conductive polymer layer on the first electrode; disposing the substrate and the semiconductor layer on the conductive polymer layer and adhering the semiconductor layer to the conductive polymer layer; and removing the substrate; and forming a second electrode on the semiconductor layer. A first adhesion between the semiconductor layer and the substrate is generated. A second adhesion between the semiconductor layer and the conductive polymer layer is generated. The second adhesion is greater than the first adhesion so that while the substrate is removed, the semiconductor layer and the conductive polymer layer are still adhered.

Abstract: Disclosed is a manufacturing method for an organic optoelectronic thin film comprising the steps of providing a substrate and a first electrode; forming a semiconductor layer on the substrate, wherein the semiconductor layer includes polyethylene glycol (PEG); forming a conductive polymer layer on the first electrode; disposing the substrate and the semiconductor layer on the conductive polymer layer and adhering the semiconductor layer to the conductive polymer layer; and removing the substrate; and forming a second electrode on the semiconductor layer. A first adhesion between the semiconductor layer and the substrate is generated. A second adhesion between the semiconductor layer and the conductive polymer layer is generated. The second adhesion is greater than the first adhesion so that while the substrate is removed, the semiconductor layer and the conductive polymer layer are still adhered.