Patents by Inventor MING-KE TSAI

MING-KE TSAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11954824
    Abstract: An image pre-processing method and an image processing apparatus for a fundoscopic image are provided. A region of interest (ROI) is obtained from a fundoscopic image to generate a first image. The ROI is focused on an eyeball in the fundoscopic image. A smoothing process is performed on the first image to generate a second image. A value difference between neighboring pixels in the second image is increased to generate a third image.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: April 9, 2024
    Assignee: Acer Medical Inc.
    Inventors: Yi-Jin Huang, Chin-Han Tsai, Ming-Ke Chen
  • Publication number: 20220246509
    Abstract: A package structure and a method for forming the same are provided. The package structure includes a die, a first molding surrounding the die, a first redistribution layer (RDL), an interposer disposed over the first RDL, a second molding surrounding the interposer, a first via, and a second RDL. The first RDL includes a first dielectric layer disposed over the die and the first molding, and a first interconnect structure surrounded by the first dielectric layer and electrically connected to the die. The interposer is electrically connected to the die through the first interconnect structure. The first via extends through and within the second molding and is adjacent to the interposer. The second RDL includes a second dielectric layer disposed over the interposer and the second molding, and a second interconnect structure surrounded by the second dielectric layer and electrically connected to the via and the interposer.
    Type: Application
    Filed: April 25, 2022
    Publication date: August 4, 2022
    Inventors: CHIN-HER CHIEN, PO-HSIANG HUANG, CHENG-HUNG YEH, TAI-YU WANG, MING-KE TSAI, YAO-HSIEN TSAI, KAI-YUN LIN, CHIN-YUAN HUANG, KAI-MING LIU, FONG-YUAN CHANG, CHIN-CHOU LIU, YI-KAN CHENG
  • Patent number: 11387177
    Abstract: A package structure and a method for forming the same are provided. The package structure includes a die, a first molding surrounding the die, a first redistribution layer (RDL), an interposer disposed over the first RDL, a second molding surrounding the interposer, a first via, and a second RDL. The first RDL includes a first dielectric layer disposed over the die and the first molding, and a first interconnect structure surrounded by the first dielectric layer and electrically connected to the die. The interposer is electrically connected to the die through the first interconnect structure. The first via extends through and within the second molding and is adjacent to the interposer. The second RDL includes a second dielectric layer disposed over the interposer and the second molding, and a second interconnect structure surrounded by the second dielectric layer and electrically connected to the via and the interposer.
    Type: Grant
    Filed: June 17, 2019
    Date of Patent: July 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chin-Her Chien, Po-Hsiang Huang, Cheng-Hung Yeh, Tai-Yu Wang, Ming-Ke Tsai, Yao-Hsien Tsai, Kai-Yun Lin, Chin-Yuan Huang, Kai-Ming Liu, Fong-Yuan Chang, Chin-Chou Liu, Yi-Kan Cheng
  • Publication number: 20200395281
    Abstract: A package structure and a method for forming the same are provided. The package structure includes a die, a first molding surrounding the die, a first redistribution layer (RDL), an interposer disposed over the first RDL, a second molding surrounding the interposer, a first via, and a second RDL. The first RDL includes a first dielectric layer disposed over the die and the first molding, and a first interconnect structure surrounded by the first dielectric layer and electrically connected to the die. The interposer is electrically connected to the die through the first interconnect structure. The first via extends through and within the second molding and is adjacent to the interposer. The second RDL includes a second dielectric layer disposed over the interposer and the second molding, and a second interconnect structure surrounded by the second dielectric layer and electrically connected to the via and the interposer.
    Type: Application
    Filed: June 17, 2019
    Publication date: December 17, 2020
    Inventors: CHIN-HER CHIEN, PO-HSIANG HUANG, CHENG-HUNG YEH, TAI-YU WANG, MING-KE TSAI, YAO-HSIEN TSAI, KAI-YUN LIN, CHIN-YUAN HUANG, KAI-MING LIU, FONG-YUAN CHANG, CHIN-CHOU LIU, YI-KAN CHENG