Abstract: An optical beam splitter includes a multi-stage nested network of waveguide bifurcation branches, which includes: first-stage waveguide bifurcation branches each including a pair of first-stage waveguide segments, and second-stage waveguide bifurcation branches each including a pair of second-stage waveguide segments. Each pair of first-stage waveguide segments includes a first common end and a pair of first split ends and a pair of first interconnection portions. Each first common end points toward a first widthwise direction. Each pair of second-stage waveguide segments includes a second common end and a pair of second split ends and a pair of second interconnection portions. Each second common end and each second split end of the optical beam splitter point toward a second widthwise direction which is an opposite direction of the first widthwise direction.

Abstract: In one example in accordance with the present disclosure, an example computing device is disclosed. The example computing device includes a housing. The example computing device also includes a rotatable antenna disposed within the housing. The rotatable antenna is to rotate such that a direction of radiation is maintained in a single direction as the housing is to rotate.

Abstract: The present disclosure provides a method of making a semiconductor device. The method includes forming a semiconductor stack on a substrate, wherein the semiconductor stack includes first semiconductor layers of a first semiconductor material and second semiconductor layers of a second semiconductor material alternatively stacked on the substrate; patterning the semiconductor stack and the substrate to form a trench and an active region being adjacent the trench; epitaxially growing a liner of the first semiconductor material on sidewalls of the trench and sidewalls of the active region; forming an isolation feature in the trench; performing a rapid thermal nitridation process, thereby converting the liner into a silicon nitride layer; and forming a cladding layer of the second semiconductor material over the silicon nitride layer.

Abstract: A memory management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: detecting a status of a rewritable non-volatile memory module; and determining whether to perform a data refresh operation on the rewritable non-volatile memory module according to a first condition and a second condition. The first condition is related to a first physical unit in the rewritable non-volatile memory module. The second condition is related to a plurality of second physical units in the rewritable non-volatile memory module. The data refresh operation is configured to update data in the rewritable non-volatile memory module to reduce a bit error rate of the data.

Abstract: Embodiments of the disclosed technologies are capable of a training pipeline to fine-tune a machine learning model given a limited set of domain-specific data. The embodiments describe using a first machine learning model to generate a pseudo label associated with a domain-specific training document. The pseudo label comprises a machine-generated text of a content type extracted from the domain-specific training document. The embodiments further describe fine-tuning a second machine learning model using the pseudo label, the domain-specific training document, a first low-rank weight matrix, and a second low-rank weight matrix. The fine-tuned second machine learning model generates text of the content type from a domain-specific document.

Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a first fin and a gate electrode. The first fin extends along a first direction. The gate electrode has a sidewall extending along a second direction different from the first direction. The sidewall of the gate electrode defines an indentation adjacent to the first fin in a top view.

Abstract: A semiconductor device comprises an insulating region surrounding an active area having a channel direction and a transverse direction that is transverse to the channel direction. A source region and a drain region are disposed in the active area, and are spaced apart along the channel direction. A channel is disposed in the active area and is interposed between the source region and the drain region. The channel comprises a two-dimensional electron gas (2DEG). A gate line is oriented along the transverse direction and is disposed on the channel and has a gate width in the channel direction. The gate line comprises gate material. A gate line terminus is disposed at each end of the gate line. Each gate line terminus comprises the gate material. Each gate line terminus has a width in the channel direction that is at least 1.2 time the gate width.

Abstract: A semiconductor structure including a first semiconductor die, a second semiconductor die, a passivation layer, an anti-arcing pattern, and conductive terminals is provided. The second semiconductor die is stacked over the first semiconductor die. The passivation layer covers the second semiconductor die and includes first openings for revealing pads of the second semiconductor die. The anti-arcing pattern is disposed over the passivation layer. The conductive terminals are disposed over and electrically connected to the pads of the second semiconductor die.

Abstract: A semiconductor package includes a redistribution structure, a supporting layer, a semiconductor device, and a transition waveguide structure. The redistribution structure includes a plurality of connectors. The supporting layer is formed over the redistribution structure and disposed beside and between the plurality of connectors. The semiconductor device is disposed on the supporting layer and bonded to the plurality of connectors, wherein the semiconductor device includes a device waveguide. The transition waveguide structure is disposed on the supporting layer adjacent to the semiconductor device, wherein the transition waveguide structure is optically coupled to the device waveguide.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer adjacent to the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN); forming a second spacer adjacent to the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN); and forming a source/drain region adjacent to two sides of the second spacer.

Abstract: A package includes an electronic die, a photonic die underlying and electronically communicating with the electronic die, a lens disposed on the electronic die, and a prism structure disposed on the lens and optically coupled to the photonic die. The prism structure includes first and second polymer layers, the first polymer layer includes a first curved surface concaving toward the photonic die, the second polymer layer embedded in the first polymer layer includes a second curved surface substantially conforming to the first curved surface, and an outer sidewall of the second polymer layer substantially aligned with an outer sidewall of the first polymer layer.

Abstract: A bathtub overflow pipe includes an overflow pipe, an adapter and a over. The overflow pipe includes an extending section with an outlet. The adapter is connected to the end face of the extending section of the overflow pipe by bolts. The adapter includes a sleeve and a tab extending radially from one end of the sleeve. The sleeve includes a passage and is inserted into the outlet of the overflow pipe. The tab has a recess formed to its lower edge and communicating with the outlet for drainage. The cover includes a pillar and a rim which has a recessed area. The pillar extends axially from one of two sides of the cover and has a rib. The pillar extends through the passage of the adapter, the rib is slidably engaged with the recessed rail. The cover, the adapter and the overflow pipe can be precisely and easily assembled.

Abstract: An electronic device includes a first substrate, a second substrate, a circuit layer, a diode element, and a conductive wire. The first substrate has a first surface, a second surface opposite to the first surface, and a first side surface connected between the first surface and the second surface. The second substrate has a third surface, a fourth surface opposite to the third surface, and a second side surface connected between the third surface and the fourth surface, wherein the fourth surface is disposed away from the first surface. The circuit layer and the diode element are disposed on the first surface. The diode element and the conductive wire are electrically connected to the circuit layer. A first portion of the conductive wire is disposed on the first side surface, and a second portion of the conductive wire is disposed on the second side surface.

Abstract: An integrated circuit package and a method of forming the same are provided. The integrated circuit package includes a photonic integrated circuit die. The photonic integrated circuit die includes an optical coupler. The integrated circuit package further includes an encapsulant encapsulating the photonic integrated circuit die, a first redistribution structure over the photonic integrated circuit die and the encapsulant, and an opening extending through the first redistribution structure and exposing the optical coupler.

Abstract: A package including a first carrier, a seed layer, wires, a die and a molding material is provided. The first carrier is removed to expose the seed layer after disposing a second carrier on the molding material, then the seed layer is removed to expose the wires, and a gold layer is deposited on each of the wires by immersion gold plating, finally a semiconductor device is obtained. The gold layer is provided to protect the wires from oxidation and improve solder joint reliability.

Abstract: A display device is provided, and includes a substrate and a first light shielding layer disposed on the substrate and defining a plurality of first openings. The display device includes a first light filter layer disposed in one of the first openings and a plurality of light-emitting diodes disposed on the substrate. The display device includes a second light shielding layer disposed between the substrate and the first light shielding layer, and having a plurality of second openings. The at least part of the light-emitting diodes are disposed in the second openings respectively. The display device also includes a spacer element disposed between the first light shielding layer and the second light shielding layer, wherein from a cross-section view, a shape of the spacer element is arc-shaped, and a shape of the second light shielding layer is arc-shaped.

Abstract: A graphic card assembly includes a bracket, a graphic card module, a first fin set, a centrifugal fan, a second fin set, a heat pipe set and an axial flow fan. The graphic card module is assembled to the bracket and has at least one heat source. The first fin set and the second fin set are assembled to the bracket and the first fin set thermally contacts the heat source. The centrifugal fan is disposed beside the first fin set to generate a first air flow dissipating heat from the first fin set. The heat pipe set contacts the heat source. The axial flow fan is disposed on the second fin set to generate a second air flow dissipating heat from the second fin set. The first air flow and the second air flow are separated from each other, and the second air flow passes through the bracket and the graphic card module.

Abstract: An electronic device including a first substrate, an isolating layer, a porous structure, a light conversion unit, and a color filter unit is provided. The isolating layer is disposed on the first substrate and has an opening. The porous structure is disposed in the opening and has a plurality of pores arranged irregularly. The light conversion unit is disposed in the pores. The color filter unit is disposed between the first substrate and the porous structure, and the color filter unit comprises a color filter pattern overlapped with the light conversion unit in a normal direction of the first substrate.

Abstract: An information handling system includes a hardware processor, a memory device, and a PMU to provide power to the hardware processor and memory device. A TEC chip refrigeration liquid cooling system to cool a heat-generating component device includes a cold plate thermally coupled to the heat-generating component device to transfer heat from the heat-generating component device into a cold side tank thermally coupled between the cold tank and a hot side tank, a TEC chip to, when a voltage is applied to the TEC chip increase a rate of thermal transfer of heat from the cold side tank of a first liquid cooling loop to the hot side tank of a second liquid cooling loop, and a radiator thermally coupled to the hot side tank in the second liquid cooling loop to dissipate heat transferred to the radiator out of the information handling system.

Abstract: A MEMS structure is provided. The MEMS structure includes a substrate and a backplate, the substrate has an opening portion, and the backplate is disposed on one side of the substrate and has acoustic holes. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate, and the diaphragm extends across the opening portion of the substrate and includes outer ventilation holes and inner ventilation holes arranged in a concentric manner. The outer ventilation holes and the inner ventilation holes are relatively arranged in a ring shape and surround the center of the diaphragm. The MEMS structure further includes a pillar disposed between the backplate and the diaphragm. The pillar prevents the diaphragm from being electrically connected to the backplate.