Patents by Inventor Ming Kuo

Ming Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240141922
    Abstract: A heat dissipation system of an electronic device including a body, a plurality of heat sources disposed in the body, and at least one centrifugal heat dissipation fan disposed in the body is provided. The centrifugal heat dissipation fan includes a housing and an impeller disposed in the housing on an axis. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions, and the plurality of outlets respectively correspond to the plurality of heat sources.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Applicant: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Chun-Chieh Wang, Shu-Hao Kuo
  • Publication number: 20240130614
    Abstract: An intraocular pressure inspection device includes an intraocular pressure detection unit, a high-precision positioning system and a wide-area positioning system, wherein according to the position of the intraocular pressure detection unit, a set of high-precision coordinates output by the high-precision positioning system and a set of wide-area coordinates output by the wide-area positioning system are integrated in appropriate weights to obtain a set of more precise integrated coordinate. The above-mentioned intraocular pressure inspection device can prevent the intraocular pressure detection unit from failing to operate once it is not in the working area of the high-precision positioning system.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 25, 2024
    Inventors: Shao Hung HUANG, Chao-Ting CHEN, Fong Hao KUO, Yu-Chung TUNG, Chu-Ming CHENG, Chi-Yuan KANG
  • Patent number: 11968556
    Abstract: A network quality measurement method and system are provided. In the method, a movement path and a movement speed of a vehicle device are determined according to a size of a space and an endurance time of the vehicle device, and the vehicle device is controlled to move on the movement path at the movement speed. During a movement of the vehicle device, a network quality in the space is measured according to a measurement frequency to generate network quality data. Whether the network quality in the space is changed is determined according to the network quality data. Whether there is an obstacle around the vehicle device is detected. When it is determined that the network quality in the space is changed or the obstacle is detected around the vehicle device, at least one of the movement path, the movement speed, and the measurement frequency is adjusted.
    Type: Grant
    Filed: December 26, 2021
    Date of Patent: April 23, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Hui-Ping Kuo, Sheng-Chieh Huang, Hsin-Hui Hwang, Yi-Ming Wu, Man Ju Chien
  • Publication number: 20240120376
    Abstract: Semiconductor structures and methods are provided. A semiconductor structure according to the present disclosure includes a first active region extending lengthwise along a first direction and having a first width along a second direction perpendicular to the first direction, a second active region extending lengthwise along the first direction and having a second width along the second direction, and an epitaxial feature sandwiched between the first active region and the second active region along the first direction. The first width is greater than the second width.
    Type: Application
    Filed: January 26, 2023
    Publication date: April 11, 2024
    Inventors: Po Shao Lin, Jiun-Ming Kuo, Yuan-Ching Peng, You-Ting Lin, Yu Mei Jian
  • Publication number: 20240121523
    Abstract: A light-adjusting device having first regions and second regions is provided. The light-adjusting device includes pillars that form several groups of meta structures. The groups of meta structures correspond to the first regions, and from a top view, the first regions and the second regions are arranged in a checkerboard pattern.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 11, 2024
    Inventors: Kai-Hao CHANG, Chun-Yuan WANG, Shin-Hong KUO, Zong-Ru TU, Po-Hsiang WANG, Chih-Ming WANG
  • Patent number: 11953740
    Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Publication number: 20240112358
    Abstract: Systems and techniques are provided for deep learning model optimizations. An example process can include generating, based on processing data using a neural network model, a plurality of prediction outputs associated with a plurality of output channels corresponding to a multi-channel prediction target; determining that a prediction output from the plurality of prediction outputs has a value that is outside of a quantization range and one or more remaining prediction outputs from the plurality of prediction outputs have a respective value that is within the quantization range; clamping the prediction output based on the quantization range; and generating a single channel output based on the clamped prediction output and the one or more remaining prediction outputs.
    Type: Application
    Filed: September 22, 2022
    Publication date: April 4, 2024
    Inventors: Chieh-Ming KUO, Michel Adib SARKIS
  • Patent number: 11944412
    Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: April 2, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Ying-Lun Chang, Ching-Sung Lin, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Tsung-I Lin
  • Patent number: 11947173
    Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Publication number: 20240105814
    Abstract: A first layer is formed over a substrate; a second layer is formed over the first layer; and a third layer is formed over the second layer. The first and third layers each have a first semiconductor element; the second layer has a second semiconductor element different from the first semiconductor element. The second layer has the second semiconductor element at a first concentration in a first region and at a second concentration in a second region of the second layer. A source/drain trench is formed in a region of the stack to expose side surfaces of the layers. A first portion of the second layer is removed from the exposed side surface to form a gap between the first and the third layers. A spacer is formed in the gap. A source/drain feature is formed in the source/drain trench and on a sidewall of the spacer.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 28, 2024
    Inventors: Che-Lun Chang, Jiun-Ming Kuo, Ji-Yin Tsai, Yuan-Ching Peng
  • Publication number: 20240107702
    Abstract: An information handling system having a reconfigurable cooling fan holder including a plurality of cooling fans of a cooling system operatively coupled to the reconfigurable cooling fan holder, a reconfigurable frame having a plurality of slidingly adjustable walls including a pair of lengthwise slidingly adjustable walls and a widthwise slidingly adjustable wall where the pair of lengthwise slidingly adjustable walls may be expanded or reduced in length by sliding the at least two slide bars nested adjacent to one another forming each lengthwise slidingly adjustable wall to extend or contract each lengthwise slidingly adjustable wall, and the widthwise slidingly adjustable wall may be expanded or reduced in width by sliding the at least two slide bars nested adjacent to one another forming the widthwise slidingly adjustable wall to extend or contract the widthwise slidingly adjustable wall for adjusting the width and length of the reconfigurable cooling fan holder.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Applicant: Dell Products, LP
    Inventors: Chung-An Lin, Yu-Ming Kuo, Chih-Yung Yang
  • Patent number: 11938591
    Abstract: A shot blasting cabinet with adjustable impellers includes a cabinet, a plurality of impeller apparatuses, and a plurality of adjusting devices. A shot-blasting working line is defined between an inlet and an outlet of the cabinet. The impeller apparatuses are symmetrically disposed on upper and lower sides of the cabinet. Each impeller apparatus has a protective housing, a driving device, a pair of rotary plates, and a plurality of impeller blades. The driving device connects one of the rotary plates. The protective housing covers the pair of rotary plates and the impeller blades, and defines a shot-blasting exit surface. The shot-blasting exit surface communicates with an interior of the cabinet. The adjusting devices are used to adjust an angle and a distance of the shot-blasting exit surface relative to the shot-blasting working line.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 26, 2024
    Inventors: Tai-An Liao, Kao-Hsiung Liao, Ping-Yuan Liao, Tsai-Ming Kuo
  • Patent number: 11937903
    Abstract: A blood pressure device includes a first blood pressure measuring device, a second blood pressure measuring device, and a controller. The first blood pressure measuring device is to be worn on a first position of a wrist so as to obtain a first blood pressure information of the first position. The second blood pressure measuring device is to be worn on a second position of the wrist so as to obtain a second blood pressure information of the second position. The controller is electrically coupled to the first blood pressure measuring device and the second blood pressure measuring device so as to adjust tightness between the expanders and the user's skin, respectively. The controller receives, processes, and calculates a pulse transit time between the first blood pressure information and the second blood pressure information, and the controller obtains at least one blood pressure value based on the pulse transit time.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: March 26, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Chin-Wen Hsieh
  • Patent number: 11943584
    Abstract: A micro-electro-mechanical system (MEMS) microphone is provided. The MEMS microphone includes a substrate, a diaphragm, a backplate and a first protrusion. The substrate has an opening portion. The diaphragm is disposed on one side of the substrate and extends across the opening portion of the substrate. The backplate includes a plurality of acoustic holes. The backplate is disposed on one side of the diaphragm. An air gap is formed between the backplate and the diaphragm. The first protrusion extends from the backplate towards the air gap.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: March 26, 2024
    Assignee: FORTEMEDIA, INC.
    Inventors: Chih-Yuan Chen, Jien-Ming Chen, Feng-Chia Hsu, Wen-Shan Lin, Nai-Hao Kuo
  • Publication number: 20240087961
    Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Ju CHOU, Chih-Chung Chang, Jun-Ming Kuo, Che-Yuan Hsu, Pei-Ling Kao, Chen-Hsuan Liao
  • Patent number: 11923250
    Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Ju Chou, Chih-Chung Chang, Jiun-Ming Kuo, Che-Yuan Hsu, Pei-Ling Gao, Chen-Hsuan Liao
  • Patent number: 11923318
    Abstract: A method of manufacturing a semiconductor package includes the following steps. A backside redistribution structure is formed, wherein the backside redistribution structure comprises a first dielectric layer, and a redistribution metal layer over the first dielectric layer and comprising a dummy pattern. A semiconductor device is provided over the backside redistribution structure, wherein an active surface of the semiconductor device faces away from the backside redistribution structure, the semiconductor device is electrically insulated from the dummy pattern and overlapped with the dummy pattern from a top view of the semiconductor package. A front side redistribution structure is formed over the semiconductor device, wherein the front side redistribution structure is electrically connected to the semiconductor device. A patterning process is performed on the first dielectric layer to form a marking pattern opening exposing a part of the dummy pattern.
    Type: Grant
    Filed: August 29, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Hsien Chiang, Hsien-Ming Tu, Hao-Yi Tsai, Tin-Hao Kuo
  • Publication number: 20240069277
    Abstract: A semiconductor package includes a first die stack structure and a second die stack structure, an insulating encapsulation, a redistribution structure, at least one prism structure and at least one reflector. The first die stack structure and the second die stack structure are laterally spaced apart from each other along a first direction, and each of the first die stack structure and the second die stack structure comprises an electronic die; and a photonic die electronically communicating with the electronic die. The insulating encapsulation laterally encapsulates the first die stack structure and the second die stack structure. The redistribution structure is disposed on the first die stack structure, the second die stack structure and the insulating encapsulation, and electrically connected to the first die stack structure and the second die stack structure. The at least one prism structure is disposed within the redistribution structure and optically coupled to the photonic die.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Yi Kuo, Chen-Hua Yu, Cheng-Chieh Hsieh, Che-Hsiang Hsu, Chung-Ming Weng, Tsung-Yuan Yu
  • Publication number: 20240069609
    Abstract: In one or more embodiments, an information handling system may include: at least one processor; a memory medium, communicatively coupled to the at least one processor, that stores an operating system and at least one application executable by the at least one processor; a chassis; an information handling system card port communicatively coupled to the at least one processor; a support device fastened to the chassis; and an expansion card coupled to the information handling system card port and fastened to the support device. In one or more embodiments, the support device may include an opening that permits air to pass through. In one or more embodiments, the support device may include a cover configured to obscure airflow through the opening of the support device. For example, the cover may be configured to unroll to obscure airflow through the opening of the support device.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Inventors: Yu-Ming Kuo, Chung-An Lin, Qinghong He, Derric Christopher Hobbs
  • Patent number: 11913472
    Abstract: A centrifugal heat dissipation fan including a housing and an impeller disposed in the housing on an axis is provided. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions. A heat dissipation system of an electronic device is also provided.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: February 27, 2024
    Assignee: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Chun-Chieh Wang, Shu-Hao Kuo