Abstract: A technique for passivating a PN junction adjacent a surface of a semiconductor substrate comprises coating the area of the surface adjacent the PN junction with a layer of hydrogenated amorphous silicon containing between about 5 and about 50 atomic percent of hydrogen.

Abstract: A semiconductor device having a rectifying junction after passivation is exposed to a humid ambient while being tested for humidity-induced leakage currents indicative of passivant defects such as pinholes, cracks, etc. The amplitude of the reverse biased humidity-induced current is indicative of the integrity of the passivant coverage.

Abstract: A technique for passivating a PN junction adjacent a surface of a semiconductor substrate comprises coating the area of the surface adjacent the PN junction with a layer of hydrogenated amorphous silicon containing between about 5 and about 50 atomic percent of hydrogen.

Abstract: There is disclosed a semiconductor device having a PN junction terminating at a surface and passivated by a multi-layer passivant system comprising a first layer of semi-insulating material over the surface, a layer of dielectric material over the first layer and a second layer of semi-insulating material over the dielectric layer. Preferably, the first and second layers are oxygen doped polycrystalline silicon and the dielectric layer is either silicon dioxide of frit glass fused to the first layer.

Abstract: The surface of a dielectric is exposed to gaseous WF.sub.6 and H.sub.2 at a temperature between approximately 500.degree. C. and 650.degree. C. This initiates the formation of tungsten islands on the dielectric surface without damaging the surface. An appropriate metallization layer is then deposited from the vapor phase onto the tungsten island covered dielectric surface.

Abstract: A method for depositing a refractory on a semiconductor substrate passivated with silicon dioxide and/or oxygen doped polycrystalline silicon is disclosed. The usual undercutting of the oxygen doped polycrystalline silicon or of the silicon substrate at the edge where it meets the oxide is prevented by depositing a layer of phosphorus doped polycrystalline silicon over the passivation material before the metal is deposited.

Abstract: There is disclosed a method of forming a multi-layer passivant system including a layer of oxygen doped polycrystalline silicon over the semiconductor substrate. A layer of silicon dioxide is thermally grown over the oxygen doped polycrystalline silicon layer. If desired, layers of glass and an additional oxide layer can be formed over the thermally grown oxide.

Abstract: There is disclosed a method of etching a semiconductor substrate having a region heavily doped with N type impurity atoms spaced from one surface thereof. The one surface of the substrate is masked with an oxide layer or the like and openings are formed in this layer to expose surface areas of the substrate. The substrate is exposed to a refractory metal hexafluoride at elevated temperature whereby the hexafluoride and the exposed substrate material react such that the refractory metal replaces the substrate material until the metal reaches the heavily doped region. This region substantially stops the reaction. Depending on the semiconductor device being made, the refractory metal can then be etched in an etchant that does not react with the semiconductor material to form a moat of uniform depth, or it can be left in place.

Abstract: A device and method for forming the device formed of semiconductor material provides metallization for the circuit and passivation of a rectifying junction in but a single photolithographic etching step. The device may be formed of silicon, gallium arsenide or silicon-on-sapphire. The rectifying junctions may be formed of material of opposite conductivity types or may be of the Schottky barrier type in which metal in contact with a semiconductor material forms a rectifying junction. Metal is initially deposited at suitable temperatures over all the surface of a body of material having rectifying junctions. The metal over the junctions is removed by a photolithographic resist process leaving the rectifying junctions clear of metal. The metal or metals are then heat treated at high temperatures. The rectifying junction is passivated by amorphization and hydrogenation at relatively low temperatures to provide the device with a passivated junction of graded crystallinity.