Patents by Inventor Ming M. Li

Ming M. Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12635041
    Abstract: The present invention, in some embodiments, is a method the includes obtaining a sheet of a non-ferrous alloys as feedstock having a first edge and a second edge, heating the feedstock using a transverse flux induction heating system to form a heat treated product and concomitant with the heating step, cooling at least one of the first edge and the second edge of the feedstock by cross-flowing at least one fluid across the at least one of the first edge and the second edge of the feedstock.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: May 19, 2026
    Assignee: Arconic Technologies LLC
    Inventors: James Wiswall, John A. Anderson, Ming M. Li, Gavin F. Wyatt-Mair
  • Publication number: 20200305242
    Abstract: The present invention, in some embodiments, is a method the includes obtaining a sheet of a non-ferrous alloys as feedstock having a first edge and a second edge, heating the feedstock using a transverse flux induction heating system to form a heat treated product and concomitant with the heating step, cooling at least one of the first edge and the second edge of the feedstock by cross-flowing at least one fluid across the at least one of the first edge and the second edge of the feedstock.
    Type: Application
    Filed: December 5, 2016
    Publication date: September 24, 2020
    Applicant: Arconic Inc.
    Inventors: James Wiswall, John A. Anderson, Ming M. Li, Gavin F. Wyatt-Mair
  • Patent number: 7455004
    Abstract: The apparatus for trimming sheet material includes a top knife and an opposing bottom knife for trimming sheet or web material passing between the top and bottom knives. The top knife defines a negative rake angle with a substantially vertical plane passing through a cutting edge of the bottom knife. The negative rake angle may be between about ?10° and ?30° and, more preferably, between about ?12° and ?20°. The top and bottom knives may be disk or block knives.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: November 25, 2008
    Assignee: Alcoa Inc.
    Inventors: Ming M. Li, Hongbing Lu, James M. Rushing, Dennis P. Henninger, Xingyun Shen
  • Publication number: 20040173074
    Abstract: The apparatus for trimming sheet material includes a top knife and an opposing bottom knife for trimming sheet or web material passing between the top and bottom knives. The top knife defines a negative rake angle with a substantially vertical plane passing through a cutting edge of the bottom knife. The negative rake angle may be between about −10° and −30° and, more preferably, between about −12° and −20°. The top and bottom knives may be disk or block knives.
    Type: Application
    Filed: March 6, 2003
    Publication date: September 9, 2004
    Inventors: Ming M. Li, Hongbing Lu, James M. Rushing, Dennis P. Henninger, Xingyun Shen
  • Publication number: 20040173067
    Abstract: The apparatus for trimming sheet material includes a top knife and an opposing bottom knife for trimming sheet or web material passing between the top and bottom knives. The top knife defines a negative rake angle with a substantially vertical plane passing through a cutting edge of the bottom knife. The negative rake angle may be between about −10° and −30° and, more preferably, between about −12° and −20°. The top and bottom knives may be disk or block knives.
    Type: Application
    Filed: March 6, 2003
    Publication date: September 9, 2004
    Inventors: Ming M. Li, Hongbing Lu, James M. Rushing, Dennis P. Henninger, Xingyun Shen
  • Patent number: 5960311
    Abstract: A method of forming a thick interlevel dielectric layer containing sealed voids, formed in a controlled manner, over a substantially planar surface in semiconductor device structure, and the semiconductor structure formed according to such a method. The sealed voids are used to reduce interlevel capacitance. A plurality of metal signal lines are formed over a globally planarized insulator. A thick layer of first conformal interlevel dielectric is deposited over the metal signal lines and over the intermetal spacings formed between the metal signal lines. Because of the thickness, flow properties, and manner of deposition of the interlevel dielectric and the aspect ratio the intermetal spacings, voids are formed in the first conformal interlevel dielectric, in the intermetal spacings. This interlevel dielectric is then etched or polished back to the desired thickness, which exposes the voids in the wider intermetal spacings, but does not expose voids in the narrower intermetal spacings.
    Type: Grant
    Filed: August 14, 1997
    Date of Patent: September 28, 1999
    Assignee: STMicroelectronics, Inc.
    Inventors: Abha R. Singh, Artur P. Balasinski, Ming M. Li
  • Patent number: 5847464
    Abstract: A method of forming a thick interlevel dielectric layer containing sealed voids formed in a controlled manner, over a substantially planar surface in semiconductor device structure, and the semiconductor structure formed according to such a method. The sealed voids are used to reduce interlevel capacitance. A plurality of metal signal lines are formed over a globally planarized insulator. A thick layer of first conformal interlevel dielectric is deposited over the metal signal lines and over the intermetal spacings formed between the metal signal lines. Because of the thickness, flow properties, and manner of deposition of the interlevel dielectric and the aspect ratio the intermetal spacings, voids are formed in the first conformal interlevel dielectric, in the intermetal spacings. This interlevel dielectric is then etched or polished back to the desired thickness, which exposes the voids in the wider intermetal spacings, but does not expose voids in the narrower intermetal spacings.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: December 8, 1998
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventors: Abha R. Singh, Artur P. Balasinski, Ming M. Li