Abstract: A boot data reading system includes a storage circuit and a processor circuit. The storage circuit is configured to store first boot data and second boot data. The first boot data includes a first segment and a second segment. The second boot data includes a third segment, and the third segment corresponds to the first segment. The processor circuit is coupled to the storage circuit. The processor circuit reads the first segment and determines whether the first segment is correct or not. When the first segment is correct, the processor circuit reads the second segment and determines whether the second segment is correct or not. When the first segment is incorrect, the processor circuit reads the third segment and determines whether the third segment is correct or not.

Abstract: Acoustically mediated pulsed radiation sources, phased arrays incorporating the radiation sources, and methods of using the radiation sources and phased arrays to generate electromagnetic radiation via magnetic dipole emission are provided. The radiation sources are based on a superlattice heterostructure that supports in-phase magnetic dipole emission from a series of magnetic insulator layers disposed along the length of the heterostructure.

Abstract: A system for implementing continuous co-phase flexible alternating current traction power supply and an operation mode therefor includes at least one flexible traction substation and neutral sections. Each flexible traction substation includes a first power inlet line and a second power inlet line, each of which is coupled to one end of a corresponding breaker, the other end of the corresponding breaker is coupled to a primary side of one traction transformer, and a secondary side of the traction transformer is coupled to a plurality of SPCs. SPCs corresponding to each set of traction transformer are coupled in parallel and coupled to a bus of the flexible traction substation through breakers. One feeder line is provided between the bus of the flexible traction substation and each of an up-track line and a down-track line of an overhead contact system, and each feeder line is provided with one up-to-net breaker thereon.

Abstract: A control integrated circuit (IC) for maintaining video output to a conditional access module (CAM) with aid of reference clock regeneration, an associated television receiver and an associated method are provided. The control IC may include an input control circuit, a frame processing circuit, a clock control circuit, and an output control circuit. The input control circuit receives a transport stream (TS) data signal from a demodulator circuit, the frame processing circuit performs frame processing operations on the TS data signal to prepare a plurality of frames, the clock control circuit generates a second reference clock signal according to the TS valid signal to be a replacement for a first reference clock signal, and the output control circuit outputs the plurality of frames to the CAM according to the second reference clock signal, to allow the CAM to perform conditional access (CA) control for the television receiver.

Abstract: Acoustically mediated pulsed radiation sources, phased arrays incorporating the radiation sources, and methods of using the radiation sources and phased arrays to generate electromagnetic radiation via magnetic dipole emission are provided. The radiation sources are based on a superlattice heterostructure that supports in-phase magnetic dipole emission from a series of magnetic insulator layers disposed along the length of the heterostructure.

Abstract: A method of managing blocks in a flash memory includes: detecting states of blocks of a reserved area in the flash memory and building a bad block management table accordingly; recording mappings between bad blocks of an user area in the flash memory and good blocks of the reserved area into the bad block management table; when the bad block management table indicates there is no good block remaining in the reserved area that can be mapped to, selecting one of bad blocks of the reserved area or the user area and obtaining a recollected block after erasing the selected bad block; recording a mapping between the recollected block and a bad block in the user area into the bad block management table; and based on the bad block management table, programming data into the recollected block.

Abstract: A timing generator, a timing generating method and an associated control chip are provided, wherein the timing generator includes a receiving circuit, a transmitting circuit coupled to the receiving circuit, and a control unit respectively coupled to the receiving circuit and the transmitting circuit. The receiving circuit may be configured to receive a timing data set from a storage device. The transmitting circuit may be configured to select a specific signal type within multiple signal types according to the timing data set, and output an output signal having the specific signal type with a specific time length, wherein the timing data set indicates the specific signal type and the specific time length. The control unit may be configured to control operations of the receiving circuit and the transmitting circuit.

Abstract: A method of managing blocks in a flash memory includes: detecting states of blocks of a reserved area in the flash memory and building a bad block management table accordingly; recording mappings between bad blocks of an user area in the flash memory and good blocks of the reserved area into the bad block management table; when the bad block management table indicates there is no good block remaining in the reserved area that can be mapped to, selecting one of bad blocks of the reserved area or the user area and obtaining a recollected block after erasing the selected bad block; recording a mapping between the recollected block and a bad block in the user area into the bad block management table; and based on the bad block management table, programming data into the recollected block.

Abstract: A method for performing multi-system log access management and an associated SoC IC are provided. The method may include: utilizing multiple partial circuit of at least one processor in the SoC IC to run multiple systems, respectively; utilizing a first partial circuit to execute at least one first log management procedure, to configure at least one memory into multiple ring buffers, to record a set of first logs of a first system running on the first partial circuit into a first ring buffer, and to write multiple sets of logs respectively stored in the multiple ring buffers into a file system; and utilizing at least one second partial circuit to execute at least one second log management procedure, to record at least one set of second logs of at least one second system running on the at least one second partial circuit into at least one second ring buffer.

Abstract: A timing generator, a timing generating method and an associated control chip are provided, wherein the timing generator includes a receiving circuit, a transmitting circuit coupled to the receiving circuit, and a control unit respectively coupled to the receiving circuit and the transmitting circuit. The receiving circuit may be configured to receive a timing data set from a storage device. The transmitting circuit may be configured to select a specific signal type within multiple signal types according to the timing data set, and output an output signal having the specific signal type with a specific time length, wherein the timing data set indicates the specific signal type and the specific time length. The control unit may be configured to control operations of the receiving circuit and the transmitting circuit.