Patents by Inventor Ming-Sen Hsu

Ming-Sen Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220399478
    Abstract: A micro light-emitting film structure includes a first conductivity type semiconductor film, a light-emitting film, a second conductivity type semiconductor film, a first contact electrode, and a second contact electrode. The first conductivity type semiconductor film has first and second surfaces opposite to each other. The second surface includes an asperity. A height difference of relief of the asperity is less than or equal to 1 ?m. The light-emitting film is disposed on the first surface. The second conductivity type semiconductor film is connected to the light-emitting film sandwiched between the second conductivity type semiconductor film and the first conductivity type semiconductor film. The first contact electrode is connected to the first conductivity type semiconductor film. The second contact electrode is connected to the second conductivity type semiconductor film. A thickness of the micro light-emitting film structure is equal to or smaller than 10 ?m.
    Type: Application
    Filed: December 3, 2021
    Publication date: December 15, 2022
    Inventors: Ming-Sen HSU, Li-Wei HUNG, Hsin-Liang YEH, Wei-Chen CHIEN
  • Publication number: 20220131039
    Abstract: A micro light-emitting diode includes an epitaxial structure, an insulation layer, a first electrode, and a second electrode. The epitaxial structure includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer. The epitaxial structure has a cavity penetrating the second semiconductor layer and the light-emitting layer and exposing a portion of the first semiconductor layer. The insulation layer covers the epitaxial structure, and a side surface and a bottom surface of the cavity. The insulation layer has a first hole exposing a portion of the second semiconductor layer, and a second hole exposing a portion of the bottom surface. The first electrode covers the exposed portion of the bottom surface. The second electrode covers the exposed portion of the second semiconductor layer and is distant from the first electrode. The cavity is distant from an edge of the micro LED.
    Type: Application
    Filed: December 28, 2020
    Publication date: April 28, 2022
    Inventors: Li-Wei HUNG, Hsin-Liang YEH, Wei-Chen CHIEN, Ming-Sen HSU
  • Patent number: 11165003
    Abstract: An ultraviolet light-emitting diode is disclosed. The ultraviolet light-emitting diode includes a transparent substrate, an ultraviolet illuminant epitaxial structure, and a transparent structure. The transparent substrate includes a first surface and a second surface which are opposite to each other, and a plurality of side surfaces surrounding and disposed between the first surface and the second surface. The ultraviolet illuminant epitaxial structure is disposed on the first surface of the transparent substrate. The transparent structure has a light-entering surface and a light-exiting surface which are opposite to each other. The light-entering surface of the transparent structure is adjacent to the second surface of the transparent substrate, and a refractive index of the transparent structure is between a refractive index of the transparent substrate and a refractive index of air.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: November 2, 2021
    Assignee: EPILEDS TECHNOLOGIES, INC.
    Inventors: Wei-Pu Zheng, Fu-Yi Tsai, Ming-Sen Hsu
  • Publication number: 20210249554
    Abstract: An ultraviolet light-emitting diode includes a transparent substrate and an ultraviolet illuminant epitaxial structure. The ultraviolet illuminant epitaxial structure includes an N-type semiconductor layer which is disposed on the transparent substrate and comprised of a first portion and a second portion. The first portion of the N-type semiconductor layer includes a light-emitting layer disposed thereon, a P-type semiconductor layer on the light emitting layer, and a P-type contact layer disposed on the P-type semiconductor layer. The second portion of the N-type semiconductor layer includes an N-type semiconductor film disposed thereon and separated from the light-emitting layer. A band gap of the N-type semiconductor film is smaller than a band gap of the light-emitting layer. The N-type contact is disposed on the N-type semiconductor film. The P-type contact is disposed on the P-type contact layer.
    Type: Application
    Filed: August 13, 2020
    Publication date: August 12, 2021
    Inventors: Yen-Ting LU, Che-Wei KUO, Fu-Yi TSAI, Wei-Pu ZHENG, Kung-Hsieh HSU, Ming-Sen HSU
  • Publication number: 20210167260
    Abstract: An ultraviolet light-emitting diode is disclosed. The ultraviolet light-emitting diode includes a transparent substrate, an ultraviolet illuminant epitaxial structure, and a transparent structure. The transparent substrate includes a first surface and a second surface which are opposite to each other, and a plurality of side surfaces surrounding and disposed between the first surface and the second surface. The ultraviolet illuminant epitaxial structure is disposed on the first surface of the transparent substrate. The transparent structure has a light-entering surface and a light-exiting surface which are opposite to each other. The light-entering surface of the transparent structure is adjacent to the second surface of the transparent substrate, and a refractive index of the transparent structure is between a refractive index of the transparent substrate and a refractive index of air.
    Type: Application
    Filed: December 12, 2019
    Publication date: June 3, 2021
    Inventors: Wei-Pu ZHENG, Fu-Yi TSAI, Ming-Sen HSU
  • Patent number: 10516250
    Abstract: A near-infrared vertical-cavity surface-emitting laser is provided, which utilizes a conventional distributed Bragg reflector and a complex Bragg reflector which consists of a dielectric Bragg reflector and a reflective metal layer to construct a cavity. With the disposition of a confining layer, the light emitted from an active layer is confined in the cavity to resonate so as to emit a laser light. The thickness of the complex Bragg reflector is much thinner than that of the conventional distributed Bragg reflector, thereby lowering the cost of manufacture. In addition, with the transfer method, the laser is transferred to the substrate with high thermal conductivity to increase the heat dissipation efficiency. Therefore, the present invention can maintain operation while emitting a high-power laser.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: December 24, 2019
    Assignee: EPILEDS TECHNOLOGIES, INC.
    Inventors: Wen-Herng Su, Ming-Sen Hsu
  • Publication number: 20190214526
    Abstract: An UV light-emitting diode includes a patterned substrate, a template layer, a growth layer, a first n-type semiconductor layer, an intrinsic semiconductor layer, a second n-type semiconductor layer, a plurality of layers of multiple quantum wells, a barrier layer, a first electron blocking layer, a second electron blocking layer, a first p-type semiconductor layer and a second p-type semiconductor layer in sequence from a bottom layer to a top layer. Whereas the aforementioned layers all include Group III nitride materials and the number of layers for the plurality of layers of multiple quantum wells is at least five layers. Because the first n-type semiconductor layer, the first p-type semiconductor layer, and the plurality of layers of multiple quantum wells all contain aluminum, short-wavelength UV light is emitted when a current is applied.
    Type: Application
    Filed: August 6, 2018
    Publication date: July 11, 2019
    Inventors: KUNG-HSIEH HSU, MING-SEN HSU
  • Patent number: 10326049
    Abstract: An UV light-emitting diode includes a patterned substrate, a template layer, a growth layer, a first n-type semiconductor layer, an intrinsic semiconductor layer, a second n-type semiconductor layer, a plurality of layers of multiple quantum wells, a barrier layer, a first electron blocking layer, a second electron blocking layer, a first p-type semiconductor layer and a second p-type semiconductor layer in sequence from a bottom layer to a top layer. Whereas the aforementioned layers all include Group III nitride materials and the number of layers for the plurality of layers of multiple quantum wells is at least five layers. Because the first n-type semiconductor layer, the first p-type semiconductor layer, and the plurality of layers of multiple quantum wells all contain aluminum, short-wavelength UV light is emitted when a current is applied.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: June 18, 2019
    Assignee: Epileds Technologies, Inc.
    Inventors: Kung-Hsieh Hsu, Ming-Sen Hsu
  • Patent number: 10326046
    Abstract: A growth method of aluminum gallium nitride is disclosed. The method includes the steps of: providing a substrate; forming a first aluminum gallium nitride layer on the substrate at a first temperature; and forming a second aluminum gallium nitride layer, on the first aluminum gallium nitride layer, at a second temperature. The first temperature is higher than the second temperature.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: June 18, 2019
    Assignee: Epileds Technologies, Inc.
    Inventors: Kung-Hsieh Hsu, Ming-Sen Hsu
  • Publication number: 20190067514
    Abstract: The present disclosure comprises a semiconductor light emitting element and a manufacturing method thereof. In the method, a light emitting element layer is firstly formed on an epitaxial substrate, and then a bonding adhesive is filled and a first substrate is bonded onto an upper surface of the light emitting element layer. Further, the epitaxial substrate is removed to expose a lower surface of the light emitting element layer and a second substrate is disposed on the lower surface. And further, the bonding adhesive is dissolved to remove the first substrate, and the light emitting element layer is finally cut together with the second substrate to form a plurality of semiconductor light emitting elements. The epitaxial substrate is replaced with the second substrate to solve the problem in which the substrate may be broken or warped during separation of the semiconductor light-emitting elements.
    Type: Application
    Filed: February 22, 2018
    Publication date: February 28, 2019
    Inventors: HSIN LIANG YEH, MING-SEN HSU
  • Publication number: 20180258550
    Abstract: The present application provides a growth method of aluminum nitride (AlN), including the following steps: providing a substrate; using a metal organic chemical vapor deposition (MOCVD) device to simultaneously supply metal source gas, nitrogen source gas and group VI element source gas to the substrate to form an AlN nucleation layer on the substrate; and using the MOCVD device to simultaneously supply the nitrogen source gas and the metal source gas to the AlN nucleation layer to form an AlN crystalline layer on the AlN nucleation layer.
    Type: Application
    Filed: June 28, 2017
    Publication date: September 13, 2018
    Inventors: Kung-Hsieh Hsu, Ming-Sen Hsu
  • Publication number: 20170345967
    Abstract: A growth method of aluminum gallium nitride is disclosed. The method includes the steps of: providing a substrate; forming a first aluminum gallium nitride layer on the substrate at a first temperature; and forming a second aluminum gallium nitride layer, on the first aluminum gallium nitride layer, at a second temperature. The first temperature is higher than the second temperature.
    Type: Application
    Filed: September 2, 2016
    Publication date: November 30, 2017
    Inventors: KUNG-HSIEH HSU, MING-SEN HSU
  • Patent number: 9812322
    Abstract: A sapphire substrate with patterned structure includes a sapphire base; a plurality of the cavities formed on a surface of the sapphire base; and a template layer. The plurality of the cavities are periodically arranged at a predetermined distance from each other, and each of the plurality of the cavities has a bottom surface and a top opening. Each of the plurality of the cavities comprises at least a first and a second inclined surfaces, and the first and the second inclined surfaces are inclined by a first and a second angles respectively with respect to the bottom surface of the plurality of the cavities.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: November 7, 2017
    Assignee: Epileds Technologies, Inc.
    Inventors: Kung-Hsieh Hsu, Cheng-Yu Chiu, Ming-Sen Hsu, Chun-Hung Chen, Chun-Yi Lee
  • Patent number: 9666429
    Abstract: A method for growing Group III nitride is provided, which includes the following steps. A plurality of notches separated from each other are formed at the epitaxial substrate surface via the pattering process. The plurality of notches each has at least one stepping structure with a predetermined inclination angle, wherein the stepping structure in each notch gradually descends towards the center of the corresponding notch. The Group III nitride is grown on the epitaxial substrate via epitaxy process. Wherein, the Group III nitride growing at an upper portion of the epitaxial substrate restricts the vertical growth of the Group III nitride growing at the lower portion of the epitaxial substrate, and the Group III nitride growing at the lower portion of the epitaxial substrate promotes the lateral growth of the Group III nitride growing at the upper portion of the epitaxial substrate.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: May 30, 2017
    Assignee: EPILEDS TECHNOLOGIES, INC.
    Inventors: Kung-Hsieh Hsu, Ming-Sen Hsu
  • Publication number: 20170062655
    Abstract: A sapphire substrate with patterned structure includes a sapphire base; a plurality of the cavities formed on a surface of the sapphire base; and a template layer. The plurality of the cavities are periodically arranged at a predetermined distance from each other, and each of the plurality of the cavities has a bottom surface and a top opening. Each of the plurality of the cavities comprises at least a first and a second inclined surfaces, and the first and the second inclined surfaces are inclined by a first and a second angles respectively with respect to the bottom surface of the plurality of the cavities.
    Type: Application
    Filed: August 26, 2015
    Publication date: March 2, 2017
    Inventors: Kung-Hsieh Hsu, Cheng-Yu Chiu, Ming-Sen Hsu, Chun-Hung Chen, Chun-Yi Lee
  • Patent number: 8097476
    Abstract: This invention discloses a light emitting diode, a wafer level package method, a wafer level bonding method, and a circuit structure for a wafer level package. The light emitting diode includes a package carrier, a conducting material, at least one light emitting diode structure and a package material. The package carrier has at least one package unit and two through holes on the package carrier and corresponding to the package unit. The conducting material is disposed in the through holes and formed at the bottom of the package unit. The light emitting diode structure is formed on a substrate. The substrate having a light emitting diode structure is flipped over in the package unit, and the electrodes of the light emitting diode structure are bonded with the conducting material. After the substrate is removed, a package material is stuffed in the package unit or on the light emitting diode structure.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: January 17, 2012
    Assignees: Epileds Technologies Inc., Silicon Base Developmen Inc.
    Inventors: Charng-Shyang Jong, Ming-Sen Hsu, Chin-Fu Ku, Chih-Ming Chen, Deng-Huei Hwang
  • Publication number: 20100291772
    Abstract: The present invention discloses a semiconductor manufacturing method. The method for activating a p-type impurity doped in a semiconductor element in a chamber comprises that a vacuum pressure is exerted to the chamber first, and the semiconductor element is heated to a preset temperature and the heating is persisted for a preset period to activate the p-type impurity doped in the semiconductor element.
    Type: Application
    Filed: May 15, 2009
    Publication date: November 18, 2010
    Inventors: Cheng-Chung YANG, Ming-Sen Hsu
  • Publication number: 20080099771
    Abstract: This invention discloses a light emitting diode, a wafer level package method, a wafer level bonding method, and a circuit structure for a wafer level package. The light emitting diode includes a package carrier, a conducting material, at least one light emitting diode structure and a package material. The package carrier has at least one package unit and two through holes on the package carrier and corresponding to the package unit. The conducting material is disposed in the through holes and formed at the bottom of the package unit. The light emitting diode structure is formed on a substrate. The substrate having a light emitting diode structure is flipped over in the package unit, and the electrodes of the light emitting diode structure are bonded with the conducting material. After the substrate is removed, a package material is stuffed in the package unit or on the light emitting diode structure.
    Type: Application
    Filed: May 16, 2007
    Publication date: May 1, 2008
    Inventors: Charng-Shyang Jong, Ming-Sen Hsu, Chin-Fu Ku, Chih-Ming Chen, Deng-Huei Hwang
  • Publication number: 20070290214
    Abstract: A LED (Light Emitting Diode) structure with a contact layer of a multiple structure includes a nucleation layer disposed on a substrate; a conductive buffer layer disposed on the nucleation layer; an active layer disposed between an upper and a lower confinement layer, wherein the structure of active layer includes a semiconductor material mainly doped with III-V group; the contact layer made of the multilayer structure disposed on the upper confinement layer; and a transparent electrode disposed on the contact layer made of a multilayer structure; and an electrode contacted with the conductive buffer layer and isolated from the active layer and the transparent electrode.
    Type: Application
    Filed: June 13, 2007
    Publication date: December 20, 2007
    Applicant: EPILEDS TECH INC.
    Inventors: CHIN-FU KU, MING-SEN HSU