Patents by Inventor Ming Shiang Chen

Ming Shiang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7596028
    Abstract: Methods for programming and program verification of a flash memory are described that ease the buried drain contact induced operation and increase the retention window. In a first aspect of the invention, a program operation method provides varying program biases which are applied to different groups of memory cells. The program biases can be supplied as drain bias voltages or gate bias voltages. The program biases vary depending on which group of memory cells is programmed. In one embodiment, a first drain voltage VD1 is applied to the first group of memory cells M0 and Mn. A second drain voltage VD2 is applied to the second group of memory cells M1 and Mn-1, where VD2=VD1+?VD. In a second aspect of the invention, a plurality of program verification voltage levels are selected to verify that the memory cells pass the program voltage levels.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: September 29, 2009
    Assignee: Macronix International Co., Ltd.
    Inventors: Ming Shiang Chen, Wen Pin Lu, I-Jen Huang, Chi Yuan Chin, Nian-Kai Zous
  • Publication number: 20080158966
    Abstract: Methods for programming and program verification of a flash memory are described that ease the buried drain contact induced operation and increase the retention window. In a first aspect of the invention, a program operation method provides varying program biases which are applied to different groups of memory cells. The program biases can be supplied as drain bias voltages or gate bias voltages. The program biases vary depending on which group of memory cells is programmed. In one embodiment, a first drain voltage VD1 is applied to the first group of memory cells M0 and Mn. A second drain voltage VD2 is applied to the second group of memory cells M1 and Mn-1, where VD2=VD1+?VD. In a second aspect of the invention, a plurality of program verification voltage levels are selected to verify that the memory cells pass the program voltage levels.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 3, 2008
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ming-Shiang Chen, Wen-Pin Lu, I-Jen Huang, Chi Yuan Chin, Nian-Kai Zous
  • Publication number: 20060217827
    Abstract: A sound player includes a first module including a first connector and a memory electrically connected to the first connector for storing digital audio data. The sound player further includes a second module including a controller for controlling the operation of the sound player, a flash memory electrically connected to the controller for storing digital audio data, a second connector electrically connected to the controller for connecting to the first connector in a detachable manner, a user interface operable to allow a user to input a signal to the controller for selecting digital audio data stored in the flash memory of the second module or for selecting digital audio data stored in the memory of the first module through the first connector and the second connector, a decoder for converting selected digital audio data into audio signals, and an audio output port for outputting the audio signals.
    Type: Application
    Filed: January 27, 2006
    Publication date: September 28, 2006
    Inventors: Chin-Sung Hsu, Ming-Shiang Chen, Yu-Wen Huang