Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.

Abstract: A display device includes a display panel. The display panel has a functional display area. The functional display area includes a plurality of display pixels and a plurality of light transmitting regions. The plurality of display pixels are around by the plurality of the light transmitting regions. A boundary between one of the plurality of display pixels and one of the plurality of light transmitting regions comprises an arc segment.

Abstract: Provided are Chemical Mechanical Planarization (CMP) compositions that offer high and tunable Cu removal rates and low Cu static etching rates for polishing the broad bulk or advanced node copper or Through Silica Via (TSV). The CMP compositions also provide high selectivity of Cu film vs. other barrier layers, such as Ta, TaN, Ti, TiN, and SiN; and dielectric films, such as TEOS, low-k, and ultra-low-k films. The CMP polishing compositions comprise abrasive, oxidizer, at least two chelators selected from the group consisting of amino acids, amino acid derivatives, and combinations therefore; the Cu static etching reducing agents include, but not limited to, organic alkyl sulfonic acids with straight or branched alkyl chains, and salts of organic alkyl sulfonic acids.

Abstract: Polishing compositions comprising ceria coated silica particles and organic acids having one selected from the group consisting of sulfonic acid group, phosphonic acid group, pyridine compound, and combinations thereof, with pH between 5 and 10 and electrical conductivity between 0.2 and 10 millisiemens per centimeter provide very high silicon oxide removal rates for advanced semiconductor device manufacturing.

Abstract: Copper chemical mechanical planarization (CMP) polishing formulation, method and system are disclosed. The CMP polishing formulation comprises abrasive particles of specific morphology and mean particle sizes (?100 nm, ?50 nm, ?40 nm, ?30 nm, or ?20 nm), at least two or more amino acids, oxidizer, corrosion inhibitor, and water.

Abstract: Provided are Chemical Mechanical Planarization (CMP) formulations that offer high and tunable Cu removal rates and low copper dishing for the broad or advanced node copper or Through Silica Via (TSV). The CMP compositions provide high selectivity of Cu film vs. other barrier layers, such as Ta, TaN, Ti, and TiN, and dielectric films, such as TEOS, low-k, and ultra low-k films. The CMP polishing formulations comprise solvent, abrasive, at least three chelators selected from the group consisting of amino acids, amino acid derivatives, organic amine, and combinations therefor; wherein at least one chelator is an amino acid or an amino acid derivative. Additionally, organic quaternary ammonium salt, corrosion inhibitor, oxidizer, pH adjustor and biocide are used in the formulations.

Abstract: Polishing compositions comprising ceria coated silica particles and organic acids having one selected from the group consisting of sulfonic acid group, phosphonic acid group, pyridine compound, and combinations thereof, with pH between 5 and 10 and electrical conductivity between 0.2 and 10 millisiemens per centimeter provide very high silicon oxide removal rates for advanced semiconductor device manufacturing.

Abstract: Provided are Chemical Mechanical Planarization (CMP) formulations that offer high and tunable Cu removal rates and low copper dishing for the broad or advanced node copper or Through Silica Via (TSV). The CMP compositions provide high selectivity of Cu film vs. other barrier layers, such as Ta, TaN, Ti, and TiN, and dielectric films, such as TEOS, low-k, and ultra low-k films. The CMP polishing formulations comprise solvent, abrasive, at least three chelators selected from the group consisting of amino acids, amino acid derivatives, organic amine, and combinations therefor; wherein at least one chelator is an amino acid or an amino acid derivative. Additionally, organic quaternary ammonium salt, corrosion inhibitor, oxidizer, pH adjustor and biocide are used in the formulations.

Abstract: The present invention provides a chemical-mechanical polishing (CMP) composition suitable for polishing a silicon nitride-containing substrate while suppressing polysilicon removal from the substrate. The composition comprises abrasive particles suspended in an acidic aqueous carrier containing a surfactant comprising an alkyne-diol, an alkyne diol ethoxylate, or a combination thereof. Methods of polishing a semiconductor substrate therewith are also disclosed.

Abstract: The present invention provides a chemical-mechanical polishing (CMP) composition suitable for polishing a silicon nitride-containing substrate while suppressing polysilicon removal from the substrate. The composition comprises abrasive particles suspended in an acidic aqueous carrier containing a surfactant comprising an alkyne-diol, an alkyne diol ethoxylate, or a combination thereof. Methods of polishing a semiconductor substrate therewith are also disclosed.

Abstract: The invention provides a composition for chemical-mechanical polishing. The composition comprises an abrasive, a first metal rate polishing modifier agent, a second metal rate polishing modifier agent, and a liquid carrier. In one embodiment, the first metal rate polishing modifier agent has a standard reduction potential less than 0.34 V relative to a standard hydrogen electrode, and the second metal rate polishing modifier agent has a standard reduction potential greater than 0.34 V relative to a standard hydrogen electrode. In other embodiments, the first and second metal rate polishing modifier agents are different oxidizing agents.

Abstract: The present invention provides a chemical-mechanical polishing (CMP) composition suitable for polishing a silicon nitride-containing substrate while suppressing polysilicon removal from the substrate. The composition comprises abrasive particles suspended in an acidic aqueous carrier containing a surfactant comprising an alkyne-diol, an alkyne diol ethoxylate, or a combination thereof. Methods of polishing a semiconductor substrate therewith are also disclosed.

Abstract: The invention provides a composition for chemical-mechanical polishing. The composition comprises an abrasive, a first metal rate polishing modifier agent, a second metal rate polishing modifier agent, and a liquid carrier. In one embodiment, the first metal rate polishing modifier agent has a standard reduction potential less than 0.34 V relative to a standard hydrogen electrode, and the second metal rate polishing modifier agent has a standard reduction potential greater than 0.34 V relative to a standard hydrogen electrode. In other embodiments, the first and second metal rate polishing modifier agents are different oxidizing agents.

Abstract: The invention provides a composition for chemical-mechanical polishing. The composition comprises an abrasive, a first metal rate polishing modifier agent, a second metal rate polishing modifier agent, and a liquid carrier. In one embodiment, the first metal rate polishing modifier agent has a standard reduction potential less than 0.34 V relative to a standard hydrogen electrode, and the second metal rate polishing modifier agent has a standard reduction potential greater than 0.34 V relative to a standard hydrogen electrode. In other embodiments, the first and second metal rate polishing modifier agents are different oxidizing agents.

Abstract: The invention provides a composition for chemical-mechanical polishing, The composition comprises an abrasive, a first metal rate polishing modifier agent, a second metal rate polishing modifier agent, and a liquid carrier. In one embodiment, the first metal rate polishing modifier agent has a standard reduction potential less than 0.34 V relative to a standard hydrogen electrode, and the second metal rate polishing modifier agent has a standard reduction potential greater than 0.34 V relative to a standard hydrogen electrode. In other embodiments, the first and second metal rate polishing modifier agents are different oxidizing agents.

Abstract: In a method of producing chemical mechanical polishing particles and slurry, a type of organic nano particles are put in a reaction solution containing nano-scale cerium oxide; the nano-scale cerium oxide is assembled to outer surface of the organic nano particles due to electrostatic attraction among particles, so as to form chemical mechanical polishing particles having a cerium oxide shell. The chemical mechanical polishing particles having a cerium oxide shell are then used to produce chemical mechanical polishing slurry.

Abstract: A composition containing −2.5 to 70% by volume of a 30% by weight cationically modified silica sol, the cationically modified SiO2 particles of which have a mean particle size of 12 to 300 nm, and 0.5 to 22% by weight of at least one oxidizing agent, with pH of 2.5 to 6, is eminently suitable as a polishing slurry for the chemical mechanical polishing of metal and metal/dielectric structures.

Abstract: The present invention discloses a thin film transistor with sub-gates and Schottky source/drain and a method of manufacturing the same. Doping of source/drain, and the following annealing steps used conventionally are omitted and the complexity of process and process costs are reduced. The temperature of the process is also decreased. A thin film transistor with sub-gates and Schottky source/drain of the invention is able to operate in both the n type and p type channel modes on the same transistor element depending on the biased voltage of the sub-gate. Moreover, an electric junction is formed by induction, using bias voltage applied on the sub-gate, which takes the place of the conventional source/drain extensions. Consequently, the off-state leakage current is reduced.

Abstract: The invention relates to a polishing slurry for the chemical-mechanical polishing of metal and metal/dielectric structures, containing from about 2.5 to about 70% by volume of a silica sol which contains 15 to 40% by weight of SiO2 particles and is stabilized by H+ or K+ ions, wherein the SiO2 particles have a mean particle size of less than 300 nm, from about 6 to about 10% by volume of hydrogen peroxide and a base in a quantity which is appropriate to set the pH (22° C.) of the polishing slurry to from about 5 to about 1.5, has a Ta removal rate of >300 Å/min and an improved selectivity. Method for making and using such a slurry.

Abstract: The present invention discloses a thin film transistor with sub-gates and Schottky source/drain and a method of manufacturing the same. Doping of source/drain, and the following annealing steps used conventionally are omitted and the complexity of process and process costs are reduced. The temperature of the process is also decreased. A thin film transistor with sub-gates and Schottky source/drain of the invention is able to operate in both the n type and p type channel modes on the same transistor element depending on the biased voltage of the sub-gate. Moreover, an electric junction is formed by induction, using bias voltage applied on the sub-gate, which takes the place of the conventional source/drain extensions. Consequently, the off-state leakage current is reduced.