Patents by Inventor Ming-Shiou Kuo
Ming-Shiou Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230138317Abstract: An apparatus for semiconductor processing is provided. The apparatus includes a housing comprising a plurality of shelves configured to receive a plurality of substrates; a shelter plate disposed over an upper side of the housing and configured to reduce heat loss of an upper substrate of the plurality of substrates; and an airflow structure in the housing and configured to control an air circulation in the housing.Type: ApplicationFiled: January 16, 2022Publication date: May 4, 2023Inventors: Li-Chien Tseng, Ming-Shiou Kuo
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Patent number: 10190209Abstract: A thin film deposition system and method provide for multiple target assemblies that may be separately powered. Each target assembly includes a target and associated magnet or set of magnets. The disclosure provides a tunable film profile produced by multiple power sources that separately power the target arrangements. The relative amounts of power supplied to the target arrangements may be customized to provide a desired film and may be varied in time to produce a film with varied characteristics.Type: GrantFiled: July 17, 2017Date of Patent: January 29, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-En Kao, Ming-Chin Tsai, You-Hua Chou, Chen-Chia Chiang, Chih-Tsung Lee, Ming-Shiou Kuo
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Patent number: 10043892Abstract: A method for manufacturing a semiconductor device is provided, including forming a fin field effect transistor (FinFET) structure on a semiconductor substrate. The FinFET structure includes at least one fin, and a gate electrode structure and source/drain regions on the at least one fin. A dielectric film is formed over the at least on fin. The dielectric film is irradiated with ultra violet (UV) radiation from a single UV source.Type: GrantFiled: June 13, 2016Date of Patent: August 7, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chia-Ying Li, Ming-Shiou Kuo, Wei-Ching Wu, Zong-Han Li, Ching-Lun Lai
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Publication number: 20170358663Abstract: A method for manufacturing a semiconductor device is provided, including forming a fin field effect transistor (FinFET) structure on a semiconductor substrate. The FinFET structure includes at least one fin, and a gate electrode structure and source/drain regions on the at least one fin. A dielectric film is formed over the at least on fin. The dielectric film is irradiated with ultra violet (UV) radiation from a single UV source.Type: ApplicationFiled: June 13, 2016Publication date: December 14, 2017Inventors: Chia-Ying LI, Ming-Shiou KUO, Wei-Ching WU, Zong-Han LI, Ching-Lun LAI
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Publication number: 20170314121Abstract: A thin film deposition system and method provide for multiple target assemblies that may be separately powered. Each target assembly includes a target and associated magnet or set of magnets. The disclosure provides a tunable film profile produced by multiple power sources that separately power the target arrangements. The relative amounts of power supplied to the target arrangements may be customized to provide a desired film and may be varied in time to produce a film with varied characteristics.Type: ApplicationFiled: July 17, 2017Publication date: November 2, 2017Inventors: Chung-En Kao, Ming-Chin Tsai, You-Hua Chou, Chen-Chia Chiang, Chih-Tsung Lee, Ming-Shiou Kuo
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Patent number: 9716044Abstract: The present disclosure provides a method of making an integrated circuit. The method includes forming a gate stack on a semiconductor substrate; forming a stressed contact etch stop layer (CESL) on the gate stack and on the semiconductor substrate; forming a first dielectric material layer on the stressed CESL using a high aspect ratio process (HARP) at a deposition temperature greater than about 440 C to drive out hydroxide (OH) group; forming a second dielectric material layer on the first dielectric material layer; etching to form contact holes in the first and second dielectric material layers; filling the contact holes with a conductive material; and performing a chemical mechanical polishing (CMP) process.Type: GrantFiled: August 18, 2011Date of Patent: July 25, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jen-Chi Chang, Chun-Li Lin, Kai-Shiung Hsu, Ming-Shiou Kuo, Wen-Long Lee, Po-Hsiung Leu, Ding-I Liu
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Patent number: 9708706Abstract: A thin film deposition system and method provide for multiple target assemblies that may be separately powered. Each target assembly includes a target and associated magnet or set of magnets. The disclosure provides a tunable film profile produced by multiple power sources that separately power the target arrangements. The relative amounts of power supplied to the target arrangements may be customized to provide a desired film and may be varied in time to produce a film with varied characteristics.Type: GrantFiled: November 30, 2011Date of Patent: July 18, 2017Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-En Kao, Ming-Chin Tsai, You-Hua Chou, Chen-Chia Chiang, Chih-Tsung Lee, Ming-Shiou Kuo
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Patent number: 8953298Abstract: A workpiece transfer system has a plurality of joints having a bearing and a primary and secondary transformer coil, wherein power provided to the primary transformer coil and secondary transformer coil of each joint produces mutual inductance between the primary and secondary transformer coil of the respective joint. A first pair of arms are rotatably coupled to a blade by a first pair of the joints, wherein the primary transformer coil of each of the first pair of joints is operably coupled to the first pair of arms, and the secondary transformer coil of each of the first pair of joints is operably coupled to the blade and an electrode beneath a dielectric workpiece retaining surface of the blade. The electrode is contactlessly energized through the transformer coils of the joint and the blade can chuck and de-chuck a workpiece by reversing current directions and by voltage adjustment.Type: GrantFiled: November 30, 2011Date of Patent: February 10, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-En Kao, You-Hua Chou, Chih-Tsung Lee, Ming-Shiou Kuo
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Patent number: 8916480Abstract: The present disclosure provides for methods and systems for controlling profile uniformity of a chemical vapor deposition (CVD) film. A method includes depositing a first layer on a substrate by CVD with a first shower head, the first layer having a first profile, and depositing a second layer over the first layer by CVD with a second shower head, the second layer having a second profile. The combined first layer and second layer have a third profile, and the first profile, the second profile, and the third profile are different from one another.Type: GrantFiled: December 7, 2011Date of Patent: December 23, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Shiou Kuo, Chih-Tsung Lee, You-Hua Chou, Ming-Chin Tsai, Chia-Ho Chen, Chin-Hsiang Lin
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Patent number: 8624394Abstract: A semiconductor device includes a semiconductor body and a low K dielectric layer overlying the semiconductor body. A first portion of the low K dielectric layer comprises a dielectric material, and a second portion of the low K dielectric layer comprise an air gap, wherein the first portion and the second portion are laterally disposed with respect to one another. A method for forming a low K dielectric layer is also disclosed and includes forming a dielectric layer over a semiconductor body, forming a plurality of air gaps laterally disposed from one another in the dielectric layer, and forming a capping layer over the dielectric layer and air gaps.Type: GrantFiled: December 7, 2011Date of Patent: January 7, 2014Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hung Jui Chang, Chih-Tsung Lee, You-Hua Chou, Shiu-Ko Jang Jian, Ming-Shiou Kuo
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Publication number: 20130147046Abstract: A semiconductor device includes a semiconductor body and a low K dielectric layer overlying the semiconductor body. A first portion of the low K dielectric layer comprises a dielectric material, and a second portion of the low K dielectric layer comprise an air gap, wherein the first portion and the second portion are laterally disposed with respect to one another. A method for forming a low K dielectric layer is also disclosed and includes forming a dielectric layer over a semiconductor body, forming a plurality of air gaps laterally disposed from one another in the dielectric layer, and forming a capping layer over the dielectric layer and air gaps.Type: ApplicationFiled: December 7, 2011Publication date: June 13, 2013Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hung Jui Chang, Chih-Tsung Lee, You-Hua Chou, Shiu-Ko Jang Jian, Ming-Shiou Kuo
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Publication number: 20130149871Abstract: The present disclosure provides for methods and systems for controlling profile uniformity of a chemical vapor deposition (CVD) film. A method includes depositing a first layer on a substrate by CVD with a first shower head, the first layer having a first profile, and depositing a second layer over the first layer by CVD with a second shower head, the second layer having a second profile. The combined first layer and second layer have a third profile, and the first profile, the second profile, and the third profile are different from one another.Type: ApplicationFiled: December 7, 2011Publication date: June 13, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ming-Shiou Kuo, Chih-Tsung Lee, You-Hua Chou, Ming-Chin Tsai, Chia-Ho Chen, Chin-Hsiang Lin
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Publication number: 20130136873Abstract: A thin film deposition system and method provide for multiple target assemblies that may be separately powered. Each target assembly includes a target and associated magnet or set of magnets. The disclosure provides a tunable film profile produced by multiple power sources that separately power the target arrangements. The relative amounts of power supplied to the target arrangements may be customized to provide a desired film and may be varied in time to produce a film with varied characteristics.Type: ApplicationFiled: November 30, 2011Publication date: May 30, 2013Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-En KAO, Ming-Chin TSAI, You-Hua CHOU, Chen-Chia CHIANG, Chih-Tsung LEE, Ming-Shiou KUO
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Publication number: 20130135784Abstract: A workpiece transfer system has a plurality of joints having a bearing and a primary and secondary transformer coil, wherein power provided to the primary transformer coil and secondary transformer coil of each joint produces mutual inductance between the primary and secondary transformer coil of the respective joint. A first pair of arms are rotatably coupled to a blade by a first pair of the joints, wherein the primary transformer coil of each of the first pair of joints is operably coupled to the first pair of arms, and the secondary transformer coil of each of the first pair of joints is operably coupled to the blade and an electrode beneath a dielectric workpiece retaining surface of the blade. The electrode is contactlessly energized through the transformer coils of the joint and the blade can chuck and de-chuck a workpiece by reversing current directions and by voltage adjustment.Type: ApplicationFiled: November 30, 2011Publication date: May 30, 2013Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-En Kao, You-Hua Chou, Chih-Tsung Lee, Ming-Shiou Kuo
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Publication number: 20130043539Abstract: The present disclosure provides a method of making an integrated circuit. The method includes forming a gate stack on a semiconductor substrate; forming a stressed contact etch stop layer (CESL) on the gate stack and on the semiconductor substrate; forming a first dielectric material layer on the stressed CESL using a high aspect ratio process (HARP) at a deposition temperature greater than about 440 C to drive out hydroxide (OH) group; forming a second dielectric material layer on the first dielectric material layer; etching to form contact holes in the first and second dielectric material layers; filling the contact holes with a conductive material; and performing a chemical mechanical polishing (CMP) process.Type: ApplicationFiled: August 18, 2011Publication date: February 21, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jen-Chi Chang, Chun-Li Lin, Kai-Shiung Hsu, Ming-Shiou Kuo, Wen-Long Lee, Po-Hsiung Leu, Ding-I Liu