Abstract: An improved structure multifunction cap comprised of cap having a placement section on the front surface with incisions on two sides and capable of accommodating the insertion and mounting of a luminescent picture as well as isolating the forehead of the user from direct contact with the luminescent picture, thereby preventing electrocution. Furthermore, there is a containment section on the side that provides for the insertion of a controller circuit which switches the power source to the luminescent picture on and off. As such, the structure of the present invention allows the multifunction cap to be worn in the day for general use, but is capable of enhanced visual attractiveness when worn at night and, furthermore, prevents electrical shock to the user while the cap is worn to ensure physical safety.

Abstract: A method for making improved polysilicon FET gate electrodes having composite sidewall spacers is achieved. After forming the polysilicon gate electrodes on the substrate, a SiO.sub.2 stress-release layer is deposited having a trapezoidal shape. A Si.sub.3 N.sub.4 layer is deposited and plasma etched back using the SiO.sub.2 layer as an etch-endpoint-detect layer to form composite sidewall spacers that include portions of the trapezoidal-shaped oxide layer. The SiO.sub.2 layer protects the source/drain areas from plasma etch damage that could cause high leakage currents. The Si.sub.3 N.sub.4 also extends over the SiO.sub.2 layer at the upper edges of the polysilicon gate electrodes. This prevents erosion of the SiO.sub.2 along the gate electrodes when the remaining oxide is removed from the source/drain areas using hydrofluoric acid wet etching.

Abstract: An apparatus for implementing block matching for motion estimation in video image processing. The apparatus receives the pixel data of an original image block and the pixel data of a compared image block selected from a number of compared image blocks during video image processing. The selected image blocks are compared to determine a movement vector. The apparatus has a multi-stage pipelined tree-architecture that includes four stages. The first computational stage produces corresponding pairs of difference data and sign data. A second compression stage in the process pipeline includes a compression array that receives all the difference data and sign data, which are added together to produce compressed summation data and compressed sign data. The third summation stage in the pipeline receives the compressed summation and sign data and produces a mean absolute error for the original and compared image block pixels.