Patents by Inventor Ming-Syan Chen

Ming-Syan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5287496
    Abstract: A dynamic, finite versioning scheme supports concurrent transaction and query processing in which there is no interference between transactions and queries and no quiescence of either transactions or queries for allowing queries to access a more up-to-date database. Only a finite number of logical versions are dynamically maintained on disk for a database page. Acquiring no locks, queries access appropriate query versions, according to their initiation times. Each corresponding query version of all the database pages constitutes a transaction-consistent, but perhaps slightly out-of-date, database snapshot. Through typical concurrency control mechanisms, different transactions access the most up-to-date versions, and their updates are allowed to be incrementally written into the database before they are committed. To save storage, a physical page copy may simultaneously represent multiple versions. The exact logical version(s) that a physical page copy represents changes dynamically and implicitly.
    Type: Grant
    Filed: February 25, 1991
    Date of Patent: February 15, 1994
    Assignee: International Business Machines Corporation
    Inventors: Ming-Syan Chen, Kun-Lung Wu, Philip Shi-lung Yu
  • Patent number: 5101480
    Abstract: An interconnection network for a plurality of process nodes, each illustratively comprised of a processor-memory pair, utilizes an hexagonal mesh arrangement of size n which is wrapped in each of the x, y, and z directions. In accordance with the invention, a unique address value is assigned to each processor node in the network, beginning at a central processor node and continuing along the x direction, and via the wrapping links, until each such processor node has a unique sequential address. Each of the rows, having first and last processor nodes therein, is wrapped by coupling each of the last processor nodes in each row to a respective first processor node in a corresponding row which is n-1 rows away. Point-to-point communication is achieved using the unique addresses of only the source and destination processor nodes, without requiring each intermediate processor node to contain global information about the entire network.
    Type: Grant
    Filed: May 9, 1989
    Date of Patent: March 31, 1992
    Assignee: The University of Michigan
    Inventors: Kang G. Shin, Ming-Syan Chen, Dilip D. Kandlur