Abstract: A flash memory device includes a Chip-On-Board (COB) type circuit board and a number of first and second contacts electrically connected to the circuit board. Each first contact includes a stiff first contact portion formed on an upper surface of the circuit board. Each second contact includes a cantilevered planar second contact portion extending along the front-to-rear direction. When the flash memory device is inserted into a USB 3.0 receptacle connector, the first and the second contact portions jointly electrically connect with the USB 3.0 receptacle connector. The planar second contact portions provide larger contacting area for mating with the corresponding contacts of the USB 3.0 receptacle connector.

Abstract: The Aeroelastic Model using the Principal Shapes of modes (AMPS) is a method used to predict flutter in gas turbine engines. Modern gas turbine engines often include rotors with flexible disks and/or significant blade geometry variations. The AMPS method accounts for the varying blade mode shapes associated with flexible disks as well as changing blade geometry, providing accurate flutter predictions for a large number of modes from a relatively small number of CFD (computational fluid dynamics) simulations. The AMPS method includes determining a smaller set of principal shapes that approximates a larger set of structural modes of interest. Using linear superposition, aerodynamic forces associated with the vibration of the principal shapes can be used to construct the full aerodynamic coupling matrix associated with the structural modes of interest. An eigenvalue equation is solved to determine a damping distribution associated with the structural modes of interest.

Abstract: A semiconductor structure for providing isolations for on-chip inductors comprises a semiconductor substrate, one or more on-chip inductors formed above the first semiconductor substrate, a plurality of through-silicon-vias formed through the first semiconductor substrate in a vicinity of the one or more on-chip inductors, and one or more conductors coupling at least one of the plurality of through-silicon-vias to a ground, wherein the plurality of through-silicon-vias provide isolations for the one or more on-chip inductors.

Abstract: A method for controlling operations of a backlight unit of a liquid crystal display (LCD) is disclosed. The LCD includes a LCD panel and the backlight unit. The LCD panel has a plurality of display units. The backlight unit is placed behind the LCD panel and has a plurality of illumination devices for providing light to the LCD panel. The method includes: (a) keeping at least two of the illumination devices turned on at all times; (b) turning off one of the illumination devices every predetermined time interval; and (c) turning on one of the illumination devices every predetermined time interval.

Abstract: A method for controlling operations of a backlight unit of a liquid crystal display (LCD) is disclosed. The LCD includes a LCD panel and the backlight unit. The LCD panel has a plurality of display units. The backlight unit is placed behind the LCD panel and has a plurality of illumination devices for providing light to the LCD panel. The method includes: (a) keeping at least two of the illumination devices turned on at all times; (b) turning off one of the illumination devices every predetermined time interval; and (c) turning on one of the illumination devices every predetermined time interval.

Abstract: An abrasive tool includes a substrate, a plurality of abrasive particle groups, and a bonding layer. The abrasive particle group consists of a plurality of abrasive particles grouped together. The abrasive particle groups are disposed in a regular pattern on the surface of the substrate and fixed on the surface by the bonding layer. To control the disposition of the abrasive particle groups, an abrasive particle template is used to form the required pattern. The size of the abrasive particle positioning holes on the template is used to adjust the number of particles in an abrasive particle group.

Abstract: An inductor in an integrated circuit comprises a conductive trace disposed over an insulating layer which overlies a semiconductor substrate of a first conductivity type and at least two deep wells of opposite conductivity type in the substrate underneath the track. In another embodiment, an inductor in an integrated circuit comprises a conductive trace disposed over an insulating layer which overlies a semiconductor substrate of a first conductivity type; a shallow trench isolation region formed in the substrate underneath the trace; and at least two deep wells of opposite conductivity type in the substrate underneath the shallow trench isolation region. The present invention also includes methods of manufacturing the aforementioned inductors.

Abstract: A method for controlling operations of a backlight unit of a liquid crystal display (LCD) is disclosed. The LCD includes a LCD panel and the backlight unit. The LCD panel has a plurality of display units. The backlight unit is placed behind the LCD panel and has a plurality of illumination devices for providing light to the LCD panel. The method includes: (a) keeping at least two of the illumination devices turned on at all times; (b) turning off one of the illumination devices every predetermined time interval; and (c) turning on one of the illumination devices every predetermined time interval.

Abstract: An inductor in an integrated circuit comprises a conductive trace disposed over an insulating layer which overlies a semiconductor substrate of a first conductivity type and at least two deep wells of opposite conductivity type in the substrate underneath the track. In another embodiment, an inductor in an integrated circuit comprises a conductive trace disposed over an insulating layer which overlies a semiconductor substrate of a first conductivity type; a shallow trench isolation region formed in the substrate underneath the trace; and at least two deep wells of opposite conductivity type in the substrate underneath the shallow trench isolation region. The present invention also includes methods of manufacturing the aforementioned inductors.

Abstract: A method of fabricating a DRAM device having nitride/oxide or tantalum pentoxide dielectric layers. The method includes: forming field oxide regions on a substrate to define active regions; forming at each active region a MOSFET comprising a top dielectric layer; forming a contact window in the MOSFET top dielectric layer; generating a doped poly-Si bottom electrode of a capacitor in electrical connection with the MOSFET through the contact window; removing surface oxide of the bottom electrode using both chemical and inductive coupled plasma (ICP) treatments; depositing nitride/oxide dielectric layers or a tantalum pentoxide dielectric layer on the ICP-treated bottom electrode; generating a doped poly-Si top electrode of the capacitor.