Patents by Inventor Ming-Tan LEE

Ming-Tan LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220084874
    Abstract: A first photoresist material is formed. The first photoresist material is exposed through a phase shift mask. The first photoresist material is developed to form a first photoresist layer, wherein the first photoresist layer comprises a plurality of first photoresist patterns and a plurality of first openings between the plurality of first photoresist patterns. A first conductive material is formed in the plurality of first openings. A second photoresist layer is formed over the first conductive material, wherein the second photoresist layer comprises at least one second opening. A second conductive material is formed in the at least one second opening. The first photoresist layer and the second photoresist layer are removed, to form a plurality of first conductive patterns and at least one second conductive pattern. A dielectric layer is formed, wherein the at least one second conductive pattern is disposed in the dielectric layer.
    Type: Application
    Filed: November 29, 2021
    Publication date: March 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Wang, Hung-Jui Kuo, Jaw-Jung Shin, Ming-Tan Lee
  • Patent number: 11215929
    Abstract: A photoresist apparatus and a method are provided. The photoresist apparatus includes a pre-baking apparatus. The pre-baking apparatus includes: a hot-plate, a first cover over the hot-plate, a second cover over the first cover, a first heating element extending along a topmost surface of the first cover, and a second heating element extending along a topmost surface of the second cover.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: January 4, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, De-Yuan Lu, Chen-Hua Yu, Ming-Tan Lee
  • Patent number: 11189521
    Abstract: Methods of manufacturing redistribution circuit structures are disclosed and one of the methods includes the following steps. A seed layer is formed over a die and an encapsulant encapsulating the die. A photoresist material is formed over the seed layer. The photoresist material is exposed through a phase shift mask to an I-line wavelength within an I-line stepper using a numerical aperture equal to or less than 0.18. The photoresist material is developed to form a photoresist layer including photoresist patterns and openings therebetween. A conductive material is formed in the openings. The photoresist patterns are removed to form conductive patterns. By using the conductive patterns as a mask, the seed layer is partially removed, to form seed layer patterns under the conductive patterns, wherein redistribution conductive patterns include the seed layer patterns and the conductive patterns respectively.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: November 30, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Wang, Hung-Jui Kuo, Jaw-Jung Shin, Ming-Tan Lee
  • Patent number: 11158600
    Abstract: A device includes a molding compound encapsulating a first integrated circuit die and a second integrated circuit die; a dielectric layer over the molding compound, the first integrated circuit die, and the second integrated circuit die; and a metallization pattern over the dielectric layer and electrically connecting the first integrated circuit die to the second integrated circuit die. The metallization pattern comprises a plurality of conductive lines. Each of the plurality of conductive lines extends continuously from a first region of the metallization pattern through a second region of the metallization pattern to a third region of the metallization pattern; and has a same type of manufacturing anomaly in the second region of the metallization pattern.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: October 26, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Jui Kuo, Ming-Tan Lee, Ting-Yang Yu, Shih-Peng Tai, I-Chia Chen
  • Patent number: 11143965
    Abstract: An optical lithography system for patterning semiconductor devices and a method of using the same are disclosed. In an embodiment, an apparatus includes an optical path; a prism disposed on the optical path; a lens disposed on the optical path; and a tunable mirror disposed on the optical path, the tunable mirror including a mirror having a concave surface at a front-side thereof; a rear support attached to a backside of the mirror; and a plurality of fine-adjustment screws extending from the rear support to the backside of the mirror.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: October 12, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, Ting-Yang Yu, Ming-Tan Lee
  • Patent number: 11145560
    Abstract: A photoresist with a detection additive is utilized to help increase the contrast of images during an after development inspection process. The detection additive fluoresces during the after development inspection process and adds to the energy that is reflected during the after development inspection process, increasing the contrast during the after development inspection process and helping to identify defects that are not otherwise detectable.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: October 12, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, Hsing-Chieh Lee, Ming-Tan Lee
  • Patent number: 11127688
    Abstract: A semiconductor package includes a semiconductor die and a redistribution structure. The redistribution structure is electrically connected to the semiconductor die. The redistribution structure includes dielectric layers, conductive traces and seal patterns. The conductive traces are embedded in the dielectric layers. At least one conductive trace of the conductive traces includes a via pattern and a routing pattern. The seal patterns are disposed on the conductive traces. One seal pattern of the seal patterns is disposed between a top surface of the routing pattern and a first dielectric layer of the dielectric layers.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: September 21, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zi-Jheng Liu, Hung-Jui Kuo, Ming-Tan Lee
  • Publication number: 20210225722
    Abstract: A package includes a device die, an encapsulant encapsulating the device die therein, a first plurality of through-vias penetrating through the encapsulant, a second plurality of through-vias penetrating through the encapsulant, and redistribution lines over and electrically coupling to the first plurality of through-vias. The first plurality of through-vias include an array. The second plurality of through-vias are outside of the first array, and the second plurality of through-vias are larger than the first plurality of through-vias.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 22, 2021
    Inventors: Hung-Jui Kuo, Tai-Min Chang, Hui-Jung Tsai, De-Yuan Lu, Ming-Tan Lee
  • Patent number: 11037877
    Abstract: A package structure includes a first die, a second die, a bridge, an encapsulant and a redistribution layer (RDL) structure. The bridge is arranged side by side with the first die and the second die. The encapsulant laterally encapsulates the first die, the second die and the bridge. The RDL structure is disposed on the first die, the second die, the bridge and the encapsulant. The first die and the second die are electrically connected to each other through the bridge and the RDL structure.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: June 15, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zi-Jheng Liu, Hung-Jui Kuo, Ming-Tan Lee
  • Publication number: 20210118697
    Abstract: A semiconductor device and method of making a conductive connector is provided. In an embodiment an opening is formed within a photoresist by adjusting the center point of an in-focus area during the exposure process. Once the photoresist has been developed to form an opening, an after development baking process is utilized to reshape the opening. Once reshaped, a conductive material is formed into the opening to take on the shape of the opening.
    Type: Application
    Filed: December 7, 2020
    Publication date: April 22, 2021
    Inventors: Hung-Jui Kuo, Ming-Tan Lee, Chen-Cheng Kuo, De-Yuan Lu
  • Publication number: 20210057347
    Abstract: A semiconductor package includes a semiconductor die and a redistribution structure. The redistribution structure is electrically connected to the semiconductor die. The redistribution structure includes dielectric layers, conductive traces and seal patterns. The conductive traces are embedded in the dielectric layers. At least one conductive trace of the conductive traces includes a via pattern and a routing pattern. The seal patterns are disposed on the conductive traces. One seal pattern of the seal patterns is disposed between a top surface of the routing pattern and a first dielectric layer of the dielectric layers.
    Type: Application
    Filed: August 22, 2019
    Publication date: February 25, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Zi-Jheng Liu, Hung-Jui Kuo, Ming-Tan Lee
  • Publication number: 20210035797
    Abstract: A single layer process is utilized to reduce swing effect interference and reflection during imaging of a photoresist. An anti-reflective additive is added to a photoresist, wherein the anti-reflective additive has a dye portion and a reactive portion. Upon dispensing the reactive portion will react with underlying structures to form an anti-reflective coating between the underlying structure and a remainder of the photoresist. During imaging, the anti-reflective coating will either absorb the energy, preventing it from being reflected, or else modify the optical path of reflection, thereby helping to reduce interference caused by the reflected energy.
    Type: Application
    Filed: July 31, 2019
    Publication date: February 4, 2021
    Inventors: Hung-Jui Kuo, Hsing-Chieh Lee, Ming-Tan Lee
  • Publication number: 20210020492
    Abstract: An apparatus for securing a wafer includes a chuck, at least one O-ring disposed on the chuck, a vacuum system connected to the chuck, such that the vacuum system comprises a plurality of vacuum holes through the chuck connected to one or more vacuum pumps, and a controller configured to control the height of the at least one O-ring relative to the top surface of the chuck. The controller is connected to pressure sensors capable of detecting a vacuum. The at least one O-ring may include a plurality of O-rings.
    Type: Application
    Filed: July 18, 2019
    Publication date: January 21, 2021
    Inventors: Chen-Hua Yu, Ming-Tan Lee, Hung-Jui Kuo
  • Patent number: 10879166
    Abstract: A semiconductor package including a substrate and a redistribution structure is provided. The substrate has at least one contact. The redistribution structure is disposed on the substrate and electrically connected to the at least one contact. The redistribution structure includes a plurality of redistribution layers, and each of the redistribution layers includes a conductive material layer, a first dielectric material layer and a second dielectric material layer. The conductive material layer has via portions and body portions located on the via portions. The first dielectric material layer is surrounding the via portions of the conductive material layer. The second dielectric material layer is disposed on the first dielectric material layer and surrounding the body portions of the conductive material layer, wherein a material of the second dielectric material layer is different than a material of the first dielectric material layer.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: December 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zi-Jheng Liu, Hung-Jui Kuo, Ming-Tan Lee
  • Patent number: 10867793
    Abstract: A semiconductor package includes a substrate and a redistribution structure. The substrate has at least one contact. The redistribution structure is disposed on the substrate and electrically connected to the at least one contact, wherein the redistribution structure includes a plurality of redistribution layers. Each of the redistribution layers include a seed layer, a conductive material layer and a dielectric material layer. The conductive material layer is disposed on the seed layer. The dielectric material layer is surrounding the conductive material layer and the seed layer. At least one of the redistribution layers include an anti-reflective layer disposed in between the seed layer and the conductive material layer.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zi-Jheng Liu, Hung-Jui Kuo, Ming-Che Ho, Ming-Tan Lee, Tzung-Hui Lee
  • Patent number: 10859922
    Abstract: A method includes placing a substrate on a stage of a lithography system, measuring a first height of the substrate at a first location on the substrate, measuring a second height of the substrate at a second location on the substrate, and performing a lithographic patterning process on the substrate, comprising directing a patterned beam of radiation at the substrate, moving the stage laterally to align the first location of the substrate with the patterned beam, moving the stage vertically to a first vertical position, the first vertical position based on the first height, moving the stage laterally to align the second location of the substrate with the patterned beam, and moving the stage vertically to a second vertical position, the second vertical position based on the second height.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Ming-Tan Lee, Hung-Jui Kuo
  • Patent number: 10861710
    Abstract: A semiconductor device and method of making a conductive connector is provided. In an embodiment an opening is formed within a photoresist by adjusting the center point of an in-focus area during the exposure process. Once the photoresist has been developed to form an opening, an after development baking process is utilized to reshape the opening. Once reshaped, a conductive material is formed into the opening to take on the shape of the opening.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, Ming-Tan Lee, Chen-Cheng Kuo, De-Yuan Lu
  • Publication number: 20200350218
    Abstract: A photoresist with a detection additive is utilized to help increase the contrast of images during an after development inspection process. The detection additive fluoresces during the after development inspection process and adds to the energy that is reflected during the after development inspection process, increasing the contrast during the after development inspection process and helping to identify defects that are not otherwise detectable.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Inventors: Hung-Jui Kuo, Hsing-Chieh Lee, Ming-Tan Lee
  • Publication number: 20200348601
    Abstract: An optical lithography system for patterning semiconductor devices and a method of using the same are disclosed. In an embodiment, an apparatus includes an optical path; a prism disposed on the optical path; a lens disposed on the optical path; and a tunable mirror disposed on the optical path, the tunable mirror including a mirror having a concave surface at a front-side thereof; a rear support attached to a backside of the mirror; and a plurality of fine-adjustment screws extending from the rear support to the backside of the mirror.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Inventors: Hung-Jui Kuo, Ting-Yang Yu, Ming-Tan Lee
  • Publication number: 20200294921
    Abstract: A package structure includes a first die, a second die, a bridge, an encapsulant and a redistribution layer (RDL) structure. The bridge is arranged side by side with the first die and the second die. The encapsulant laterally encapsulates the first die, the second die and the bridge. The RDL structure is disposed on the first die, the second die, the bridge and the encapsulant. The first die and the second die are electrically connected to each other through the bridge and the RDL structure.
    Type: Application
    Filed: March 14, 2019
    Publication date: September 17, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Zi-Jheng Liu, Hung-Jui Kuo, Ming-Tan Lee