Abstract: A signal processing system and method is disclosed, applicable to environment providing voltage to Class-H driver. When using the signal processing system, the first is to detect the volume change of inputted voice and use the detection result as a power source to generate an expectation value for the circuit; the input end of the power generation circuit also adds a voltage offset in addition to the expectation value, so that the output voltage from the output end of the power generator provided to the Class-H driver is higher than a fixed value. The signal processing system and method of the present invention can adjust automatically and rapidly the output voltage signal for the power voltage provided to the Class-H driver by using negative feedback controller (such as, negative feedback loop, voltage offset and proportional integral differential (PID)) based on the detected volume change of inputted voice.

Abstract: A signal processing system and method is disclosed, applicable to environment providing voltage to Class-H driver. When using the signal processing system, the first is to detect the volume change of inputted voice and use the detection result as a power source to generate an expectation value for the circuit; the input end of the power generation circuit also adds a voltage offset in addition to the expectation value, so that the output voltage from the output end of the power generator provided to the Class-H driver is higher than a fixed value. The signal processing system and method of the present invention can adjust automatically and rapidly the output voltage signal for the power voltage provided to the Class-H driver by using negative feedback controller (such as, negative feedback loop, voltage offset and proportional integral differential (PID)) based on the detected volume change of inputted voice and use.

Abstract: A signal processing system and method is disclosed, applicable to environment providing voltage to Class-H driver. When using the signal processing system, the first is to detect the volume change of inputted voice and use the detection result as a power source to generate an expectation value for the circuit; the input end of the power generation circuit also adds a voltage offset in addition to the expectation value, so that the output voltage from the output end of the power generator provided to the Class-H driver is higher than a fixed value. The signal processing system and method of the present invention can adjust automatically and rapidly the output voltage signal for the power voltage provided to the Class-H driver by using negative feedback controller (such as, negative feedback loop, voltage offset and proportional integral differential (PID)) based on the detected volume change of inputted voice and use.

Abstract: A signal processing system and method is disclosed, applicable to environment providing voltage to Class-H driver. When using the signal processing system, the first is to detect the volume change of inputted voice and use the detection result as a power source to generate an expectation value for the circuit; the input end of the power generation circuit also adds a voltage offset in addition to the expectation value, so that the output voltage from the output end of the power generator provided to the Class-H driver is higher than a fixed value. The signal processing system and method of the present invention can adjust automatically and rapidly the output voltage signal for the power voltage provided to the Class-H driver by using negative feedback controller (such as, negative feedback loop, voltage offset and proportional integral differential (PID)) based on the detected volume change of inputted voice.

Abstract: A time clock signal processing system and method thereof, applicable to an environment of USB synchronous mode audio clock reconstruction, is disclosed. The clock signal processing method employed by the clock signal processing system first uses a first-stage phase-locked loops (PLL) to raise the frequency of the inputted USB start-of-frame (SOF) field, provides clock synchronization and outputs the second-stage PLL; then, the second-stage PLL reduces the timing jitter of the output of the first-stage PLL to below 20 ps.

Abstract: A time clock signal processing system and method thereof, applicable to an environment of USB synchronous mode audio clock reconstruction, is disclosed. The clock signal processing method employed by the clock signal processing system first uses a first-stage phase-locked loops (PLL) to raise the frequency of the inputted USB start-of-frame (SOF) field, provides clock synchronization and outputs the second-stage PLL; then, the second-stage PLL reduces the timing jitter of the output of the first-stage PLL to below 20 ps.

Abstract: A USB controller with automatic clock generation comprising: an oscillating generator is used for generating an initial clock; a first phase locked loop is used for receiving the initial clock and outputting a controller operating clock having a first frequency; a controller is used for detecting at least one universal serial bus device and outputting an initial frame signal having a second frequency; a second phase lock loop is used for receiving the initial frame signal and outputting a sync frame signal having the first frequency; a third phase lock loop for receiving the sync frame signal and outputting a stabilizing frame signal having the first frequency; and a multiplexer is used for receiving the controller operating clock and the stabilizing frame signal and transmitting the controller operating clock or the stabilizing frame signals to the controller.